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2x C667x sharing memories

Wenjun Huang
Expert 1770 points

I am building a board that requires 2x C667x and I would like to save space for my board as it is only 160 x 100mm.

I would like to know if it is possible to use 2x C667x chips and get them to share:

a. NAND Flash memory (EMIF16) (Store data)

b. SPI NOR flash memory (SPI) (Store codes)

c. I2C EEPROM (I2C) (secondary bootloader code)

d. DDR3 SDRAM (dynamic memory)

Or is it better for each to have its own memories as the software hacks for memories sharing will be too intense.

Thanks.

  • 0
    TI__Guru* 84110 points

    Wenjun,

    The x in C667x leaves doubt in any answer being absolutely reliable. I have to assume you mean C6678, and if not then this answer may be less useful.

    Connect the two C6678s using HyperLink. This is precisely what HyperLink was originally intended for. The first C6678 can have all of the memories connected directly to it, and the second C6678 can access those through the HyperLink. The first C6678 would boot from one or more of the non-volatile memories while the second C6678 can be booted over HyperLink by the first C6678.

    I would recommend including an I2C EEPROM with the second C6678 even if you do not end up populating it on the boards in production. And include jumpers or pads to allow you to select different choices for your boot options, for both C6678s.

    Regards,
    RandyP

  • 0 in reply to RandyP
    Expert 1770 points

    Oh, I didn't realize u could do that with the hyperlink interface. I thought the hyperlink interface is used as a communicating interface for the 2x C6678. Didn't know that u could use the Hyperlink interface as a mean to share memory.

    Why is it that the answer does not apply if I am using C6672 for example?

    For the boot mode configuration, I intend to use resistors to tie to 1.8V or ground for configuration to high or low. As the bootmode/GPIO lines is internally tied high, could I create a pad to possibly tie the bootmode pin to low. Hence, if I want to configure it to high, I shall leave the pin hanging in which it is internally pull high, hence it will be configured high. If I want to configure it to low, I will mount the resistor to tie it to ground. Will that be okay?

    I will most likely have 2 C6672 (1 master + 1 slave) + shared DDR3 (on the master DDR3) + shared NAND flash (on the master EMIF16) + shared NOR flash (on the master SPI) + I2C EEPROM (on each C6672).

  • 0 in reply to Wenjun Huang
    TI__Guru* 84110 points

    Wenjun Huang said:
    Why is it that the answer does not apply if I am using C6672 for example?

    C6672 is a pure subset of the C6678 but C6670 is a bit more different. We at TI sometimes use the x to mean x != 0, but I find that confusing and a chance for a mistake. By saying C6672 specifically, it helps the discussion, in my opinion.

    Wenjun Huang said:
    For the boot mode configuration, I intend to use resistors to tie to 1.8V or ground for configuration to high or low.

    Check the HW Design Guide for recommendations on resistors to use to oppose the internal pulls and the conditions when you would can and cannot count on the internal pulls to meet your configuration requirements.

    Wenjun Huang said:
    I will most likely have 2 C6672 (1 master + 1 slave)

    Why do you want to use 2x C6672 with the intention to share the external memory resources from just one device. Unless you need the high-bandwidth of 2x the comm peripherals, it would make more sense to me to use 1x C6674, for example.

    Regards,
    RandyP

  • 0 in reply to RandyP
    Expert 1770 points

    1. Okay, I understand. I would be using either C6678 or C6672 in my hardware design.

    2. The datasheet is ambiguous. It states that If the GPIO are connected to other components, the internal pullup/pulldown resistor should not be relied upon. 1kohm pullup and pulldown resistors are recommended for all desired settings.

    If I connect the GPIO pin to a pad, is it counted as "connected to other components"? I would like to just use an external pulldown resistor to reduce the space utilized on my PCB. However, if it is not going to work, I will need to have pullup and pulldown option for each GPIO pins.

    3. I am intending to use 2x C6678 for up to 16 DSP cores. However, to reduce the space utilized on the PCB, I will need to live with DDR3, NAND Flash, NOR flash sharing.

  • 0 in reply to Wenjun Huang
    TI__Guru* 84110 points

    Wenjun Huang said:
    I would be using either C6678 or C6672 in my hardware design.

    What advantage would you have from using two C6672's instead of one C6674?

    Wenjun Huang said:
    If I connect the GPIO pin to a pad, is it counted as "connected to other components"?

    The internal pulls are weak current sources/sinks (look for the strength in the datasheet). If there is an active circuit being used with a particular pin, either driven to an input or receiving from an output, you must use the supporting or opposing external pulls. The safest choice is to provide a pad that will allow you to use the pin as a GPIO and also allow you to tie it through a resistor to either direction. Your engineering decision is fed by your design requirements, your advanced planning and intuition, and our datasheet statement that "external connectivity (resistor) can help ensure that valid logic levels are latched on these device configuration pins".

    Regards,
    RandyP

  • 0 in reply to RandyP
    Expert 1770 points

    I believe there is no significant advantage. We are using 2x C6672 because we have bought it and want to try out finish using it before we use the C6678. 

    Okay, I will connect the pad to ground and 1.8V for safety consideration. Thanks.

  • 0 in reply to Wenjun Huang
    TI__Guru* 84110 points

    Just to be clear, you will provide a means to connect the Boot Configuration signals through a resistor to ground and seperately to 1.8V. I apologize for being picky about the wording, but I want to help you guarantee your success.

    And thank you for the explanation that you have the C6672's in stock so might use them to validate the board.

    Regards,
    RandyP

  • 0 in reply to RandyP
    Expert 1770 points

    Okay, thanks. I am glad u rpicky about the wording as I am also particular about my own sentence.

    Sorry if it is not clear from my previous sentence. Your understanding is correct. I mean to say that for each GPIO/ BOOTMODE pin of the C6672, I will connect it to the center pad of a 3-pin pads. One end of the other 2 pads will be connected to 1.8V whereas the other end of the other 2 pads will be connected to ground. During assembly time, I will decide to mount a resistor either at the 1.8V end or the ground end to decide to configure high or low.

    Thanks.