• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 99 subscribers
  • Views 490 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

c5515 with two AIC3204 codec

ted chen81331
Prodigy 170 points

Im using C5515ezDSP and I have connected an additional aic3204 codec via i2s2 extension pin. The aic3204 is configured as slave and c5515 as master. 

With the aic3204 test code, I can access to a pair of stereo input and output at all time. However, I was wondering how to add in one more stereo-in so I can do some processing down mix. 

Below is a table that i have compiled for the ADC/DAC routing from the C5515 ezDSP and C5515 EVM. Was wondering what's the difference between 0x34/0x37 and 0x52/0x54. 

EzDSP C5515:

IN1_L

AIC3204_rset(0x34, 0xc0)

IN1_R

AIC3204_rset(0x37, 0xc0)

IN2_L

AIC3204_rset(0x34, 0x30)

IN2_R

AIC3204_rset(0x37, 0x30)

IN3_L

AIC3204_rset(0x34, 0x0c)

IN3_R

AIC3204_rset(0x37, 0x0c)

OUT1_HPL

AIC3204_rset(0x12, 0x08)

OUT1_HPR

AIC3204_rset(0x13, 0x08)

OUT2_LOL

AIC3204_rset(0x14, 0x08)

OUT2_LOR

AIC3204_rset(0x15, 0x08)

C5515 EVM:

IN1_L

AIC3204_rset(0x52, 0xc0) 

IN1_R

AIC3204_rset(0x55, 0xc0) 

IN2_L

AIC3204_rset(0x52, 0x30) 

IN2_R

AIC3204_rset(0x55, 0x30) 

IN3_L

AIC3204_rset(0x52, 0x0c) 

IN3_R

AIC3204_rset(0x55, 0x0c) 

OUT1_HPL

AIC3204_rset(0x52, 0x08) 

OUT1_HPR

AIC3204_rset(0x55, 0x08) 

OUT2_LOL

AIC3204_rset(0x52, 0x08) 

OUT2_LOR

AIC3204_rset(0x55, 0x08) 
regards.
ted
  • 0
    Prodigy 170 points

    I just found out what those register means. They are the same.

    0

    52

    0x00

    0x34

    GPIO/MFP5 Control Register

    0

    53

    0x00

    0x35

    DOUT/MFP2 Function Control Register 

    0

    54

    0x00

    0x36

    DIN/MFP1 Function Control Register

    0

    55

    0x00

    0x37

    MISO/MFP4 Function Control Register

    0

    56

    0x00

    0x38

    SCLK/MFP3 Function Control Register 
    Does that mean if i want another stereo in, I can use MFP3 (0x38) and MFP2 (0x35) ?
  • 0 in reply to ted chen81331
    Genius 3735 points

    Ted,

     I think you'll find that 52 decimal is equal to 34 hex.  Therefore, one of your examples in your first post is incorrect, in that it uses decimal values but in hexadecimal.

    Regards,

    Bill 

  • 0 in reply to Bill Finger
    Prodigy 205 points

    Hi There,

    I am using C5515EVM. I am trying to read the audio samples from the Stereo In1 and Stereo In2 simultaniously.

    The two inputs are working fine if I read the samples from one interrupt source at a time but not when used at the same time as given below. I want to read the data from the two independent audio sources connected to the Stereo In1 and Stereo In 2 respectively. When I use a loopback test of the received audio the second source is not reaching the DSP.  Currently I am stuck don't know what to do, your help is much appreciated.

    Thanks in advance

    Please find the code below:

    for ( ;; ) {

    /* Read Digital audio */

    while((Rcv & I2S2_IR) == 0);   // Wait for receive interrupt to be pending

            data1 = I2S2_W0_MSW_R; 

            data2 = I2S2_W1_MSW_R;

     data0 = stereo_to_mono (data1, data2);

    while((Rcv & I2S2_IR) == 0);   // Wait for receive interrupt to be pending

    data3 = I2S2_W0_MSW_R;

    data4 = I2S2_W1_MSW_R;

    data = stereo_to_mono (data3, data4);

    }

     

    AIC3204 initialization is given below:

        AIC3204_rset(  0, 0x00 );     

        AIC3204_rset(  1, 0x01 );     

        AIC3204_rset(  0, 0x01 );     

        AIC3204_rset(  1, 0x08 );     

        AIC3204_rset(  2, 0x00 );     

        AIC3204_rset(  0, 0x00 );     

        AIC3204_rset( 27, 0x00 );     

        AIC3204_rset(  4, 0x07 );     

        AIC3204_rset(  6, 0x20 );     

        AIC3204_rset(  7, 0 );        

        AIC3204_rset(  8, 0 );        

        AIC3204_rset(  5, 0x92 );     

        AIC3204_rset( 13, 0x00 );     

        AIC3204_rset( 14, 0x80 );     

        AIC3204_rset( 20, 0x80 );     

        AIC3204_rset( 11, 0x84 );     

        AIC3204_rset( 12, 0x82 );     

        AIC3204_rset( 18, 0x84 );     

        AIC3204_rset( 19, 0x82 );     

        AIC3204_rset(  0, 0x01 );     

        AIC3204_rset( 14, 0x08 );     

        AIC3204_rset( 15, 0x08 );     

        AIC3204_rset(  0, 0x00 );     

        AIC3204_rset( 64, 0x02 );     

        AIC3204_rset( 65, 0x08 );     

        AIC3204_rset( 63, 0xd4 );     

        AIC3204_rset(  0, 0x01 );     

        AIC3204_rset( 18, 0x00 );     

        AIC3204_rset( 19, 0x00 );     

        AIC3204_rset(  9, 0x0C );     

        AIC3204_rset(  0, 0x00 );     

        EVM5515_wait( 500 );        

        AIC3204_rset(  0, 0x01 );     

        AIC3204_rset( 52, 0x30 );     

        AIC3204_rset( 55, 0x30 );     

        AIC3204_rset( 52, 0x0C );    

        AIC3204_rset( 55, 0x0C );    

        AIC3204_rset( 54, 0x03 );     

        AIC3204_rset( 57, 0xC0 );     

        AIC3204_rset( 59, 0x0f );     

        AIC3204_rset( 60, 0x0f );     

        AIC3204_rset(  0, 0x00 );     

        AIC3204_rset( 81, 0xc0 );     

        AIC3204_rset( 82, 0x00 );     


        EVM5515_wait( 200 ); 

    // Wait

       

    /* I2S settings */

        I2S2_SRGR = 0x0015;

        I2S2_ICMR = 0x0028;   

    // Enable interrupts

        I2S2_CR   = 0x8012;      

    // Unmute Left and Right ADC