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Non-intrusive System Profiling

Fabian Lindner
Intellectual 880 points
Other Parts Discussed in Thread: TMS320C6678

Hi,

I'm currently working on my diploma thesis about in system debug possibilities for the C6678 Multicore DSP. My plan is to use one designated core (e.g. Core0) for a few low priority tasks and profiling of the system, while the other 7 cores run the main program.

Since we have very strict real-time constraints for our system, it would be really helpfull to get some information about the runtime and execution of the tasks on the different cores without disturbing the execution of the tasks. In other words, I want to profile my whole system, but the profiling on all but 1 core must be non-intrusive. All the data collection should be done on only one core.

To achieve this I plan to use the Embedded Trace Buffers of all cores and the system to collect information. I intend to use Core0 to preriodically read alle the ETBs and send it to a host PC e.g. over Ethernet.

So far the plan. Now I have a few question:

1. is it possible to configure all ETBs by one core (e.g. Core0)

2. is it possible to direct the interrupts (ETB half-full & ETB full) of all ETBs to one Core?

3. is one core able to read all the other ETBs of the system and the other cores without disturbing the executioin on the other cores? Or is it possible to initiate DMA-Transfers from the different ETBs to a shared memory reagion?

4. are their any libraries available to achieve this?

5. any other ideas/proposals for a non-intrusiv profiling of a multi-core system?

Regards

Fabian

  • 0
    TI__Guru* 84110 points

    Fabian,

    The ETBs are intended to give you very flexible and powerful debug capabilities without being intrusive on the system. Your plan to use one core for monitoring the activity of the other cores should work well.

    Since you have not indicated where you have gone for research on this already, here are the places you will want to look first:

    1. The TMS320C6678 datasheet. The Memory Map Summary will show you whether different modules like Tracers and ETBs are available on the global memory map for any core to access, and it details the interrupt paths that are available. The CICs and INTCs let you select interrupt sources, and there are many events that can also be directed to the EDMAs.
    2. The KeyStone Architecture Debug and Trace User Guide. This provides details on the architecture and programming information. It discusses libraries available for your help with using the debug and trace features of the KeyStone architecture.
    3. The TI Wiki Pages. Search for terms (no quotes) like "CToolsLib", "ETBLib", "etb", "STM", "system trace", and "embedded trace" for helpful articles that may lead you to the perfect solution.
    4. The TMS320C6678 Product Folder (that link in red) for all the available literature on the C6678 and KeyStone architecture.

    Regards,
    RandyP