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Unable to get interrupt from DMA completion

John Conover
Genius 4350 points
Other Parts Discussed in Thread: AM3359

We are having issues with receiving a interrupt after DMA completion. The DMA is manually triggered via a set event:

EDMA3SetEvt(SOC_EDMA30CC_0_REGS, 60);

The PaRAM struct has the bit set:

opt                  unsigned int         0x0013C00C    0x8FFFFA54    <--- Transfer interrupt bit 20 is enabled
srcAddr          unsigned int         0x8C000000    0x8FFFFA58    
aCnt               unsigned short    0x0004        0x8FFFFA5C    
bCnt               unsigned short    0x0400        0x8FFFFA5E    
destAddr       unsigned int         0x8C000800    0x8FFFFA60    
srcBIdx          short                      0x0004        0x8FFFFA64    
destBIdx       short                       0x0004        0x8FFFFA66    
linkAddr        unsigned short    0x0000        0x8FFFFA68    
bCntReload unsigned short    0x0000        0x8FFFFA6A    
srcCIdx         short                       0x0000        0x8FFFFA6C    
destCIdx      short                        0x0000        0x8FFFFA6E    
cCnt              unsigned short      0x0001        0x8FFFFA70    
rsvd              unsigned short      0x8007        0x8FFFFA72    

The ARM Interrupt controller is set up with and ISR routine, priority and is enabled:

    IntAINTCInit(); /* Initializing the ARM Interrupt Controller. */
    IntRegister(SYS_INT_EDMACOMPINT, Edma3ComplHandlerIsr); /* Registering EDMA3 Channel Controller 0 transfer completion interrupt.  */
    IntPrioritySet(SYS_INT_EDMACOMPINT, 0, AINTC_HOSTINT_ROUTE_IRQ); /* Setting the priority for EDMA3CC0 completion interrupt in AINTC. */
    IntSystemEnable(SYS_INT_EDMACOMPINT); /* Enabling the EDMA3CC0 completion interrupt in AINTC. */

     The DMA's are running but no interrupt at completion. Have we missed something here?

Thanks,

     John C.

  • 0
    TI__Prodigy 625 points

    Hello John,

    Firstly we are sorry for not attending to your post anytime earlier.

    From your PaRAM set values, I observed few things. They are:

    1)      OPT

              AB-Synchronized Transfer is used.

              STATIC bit is set. It means that you do not want to use linked transfers. However in my workings with EDMA until now, I have never set this bit to 1, even when I did 

               not want to use linked transfers.

    2)      ACNT = 4, BCNT = 1024, CCNT = 1. Therefore 4096 bytes in all have to be transmitted.

             Since AB-Sync transfer is used, A*B bytes will be transferred per event. Therefore all the 4096 bytes

             will be transferred on a single event. Is this what you intend?

    3)      The Link Address has to be 0xFFFF if you do not want to use linked transfer. Giving 0x0000 or any other value would mean that EDMA would copy 32 bytes (PaRAM  set width) from the address onwards onto its native PaRAM set space.

     

    Can you draw suggestions from my observations? I suggest you to make appropriate changes and try out your example.

    Also keep us posted on your progress.

     

    Thanks and Regards.

    Gurudutt.

  • 0 in reply to Gurudutt Bharadwaj
    Genius 4350 points

    Hi Gurudutt,

           What I was trying to do in this example was triggering the DMA via an event. There are several registers on the AM3359 needed to get the event number and DMA setting tied together. I was never able to successfully have a event (triggered by software) fire a DMA and then get the ISR from the DMA. There are really no StarterWare examples of this so I tried a few things and then had to move on as I ran out of time.

    Thanks,

         John C.