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C6670 - PCIE: Getting started

aymeric dupont
Expert 1200 points
Other Parts Discussed in Thread: TMS320C6670

Dear community,

I was asked to use my evaluation board to have windows enumerating the hardware on the PCIE.

I have no experience with PCIE and all the examples that I could find are not helping me much:

a) c:\TI_MCSDK\pdk_C6670_1_1_0_3\packages\ti\drv\exampleProjects\PCIE_exampleProject\ when run from CCS does not seem enable the card to be seen (even if I restart windows without restarting the power)

b) mcsdk_2_01_00_03\tools\boot_loader\examples\pcie\docs\ seem to only work with linux. More over, the procedure that I follow generates a header in  c:\TI_MCSDK\mcsdk_2_01_00_03\tools\boot_loader\examples\pcie\linux_host_loader\LE\ and I am not sure how else to process

c) running the examples provided in boot_loader\examples\pcie, for example hello_word do not seem to run at all

Could somebody provide me some pointers on code/documentation that could get me started. Must example allowing enumeration run from bootloader?

Anything to point me in A direction would be very appreciated

  • 0
    TI__Genius 12065 points

    Could  you check if the EVM is configured in PCIe boot mode correctly and if you have the IBL updated please?

    And once the enumeration failed, could you connect JTAG emulator to the EVM and check the PC and DEVSTAT register in the device to see which stage it is located in the boot process please?

    The following threads talks about some details about the IBL and registers check. Hope they could help.

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/191930/698130.aspx#698130

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/222043/784339.aspx#784339

    And sometimes switching to another host may solve the issue.

  • 0 in reply to Steven Ji
    Expert 1200 points

    Hello Steven,

    Thanks for you reply. I am not sure what you mean by the IBL (intermediate boot loader) updated but my evm is configured as follow:

    ROM PCIE Boot7 (off, on, on, off) (on, on, on, on) (on, on, on, off) (off, on, on, on)

    And SW9 pin 1 is on on to enable the PCI module as described in TMDXEVM6670L_Technical_Reference_Manual_1V00.pdf section 3.3.5 SW9, DSP PCIE Enable / User Defined and DSP_DSPCLKSEL / FPGA_PACLKSEL Switch Configuration.

    I am not sure if I have the enumeration failing or not but after logging in windows and checking the PCI device, I cannot see the DSP board. I assume this means that it failed.

    I will consult the threads you provided me with and try to connect with the emulator. I will also try another host.

    hope I will get back to you with good news.

    Thanks

  • 0 in reply to aymeric dupont
    Prodigy 30 points

    Have you bought the AMC to PCIE board?

  • 0 in reply to jinghua chen
    Expert 1200 points

    Steven, Jinghua,

    Thanks for your help. I have "resolved" (kind of) my problem. Thanks to the references steven provided me, I reloaded the IBL (from mcsdk_2_01_00_03), changed the host PC and I could see the TI DSP board with 5 BAR regions (I assume 32 Meg). According to the switches (SW3,4,5,6) , this is what I am setting up:

    LE, boot device PCIe, device configuration (bar config 0), PCIe as an end point (PCIESSMODE[1:0]), PLL working at 100MHz

    Finally from SW9: I am enabling pci, ALTCORECLK is used to clock the Main PLL and PASSCLK is used as a source for the PA_SS PLL

    I would like to ask a few more questions.

    First of all, I am using a AMC to PCIe adaptor and these are the information I found on the board:

    PCB VER: 17-00107-03
    PCA VER: 18-00107-03

    1) When I use my PC, on power up, the PC reset straight away (twice) then boot. On the other PC, all works fine. Have your heard of such problem and do you have any idea what can be done to resolve this issue if it arise with the card we are developing?

    2) Why do I need the IBL in the EEPROM? Is it possible to boot straight from PCI without initializing anything (all require default set up should be in the ROM boot of DSP)?

    3) I assume that with the EVM, when I set the switches to boot from PCI, the FPGA translates it to booting from I2C (this is what I saw from DEVSTAT) and the code in the EEPROM run to initialise something. My guess would be that it initializes the table described in http://www.ti.com/lit/ug/sprugy5b/sprugy5b.pdf section 3.4

    4) What are the 5 BAR regions of 32 meg (32 bit translation)  that I see in the enumeration mapped to? I cannot understand from tms320c6670_rev.D.pdf, table 2.8 what these regions are. Are they registers

    5) Could you please provide me more explanation (or pointer to documents) regarding the boot process and what is the bin file that I programmed in the EEPROM

    I am very thankful for your help.

  • 0 in reply to aymeric dupont
    TI__Genius 12065 points

    1. I am not sure what the reason is for the multiple booting on your PC. It might be related to the motherboard and BIOS. Probably the straightforward way is to use the other PC, which behaves normally.

    2. The IBL has the fix for the PLL lockup issue and also the workaround for C66x EVM to support the SSC (spread spectrum clock) provided by the PCIe slot on your PC. It might be necessary for the C66x EVM to be enumerated by some kind of PC host. The later release of EVM may have the fix in the boot code (but I am not sure about which version). You can do a quick testing that keep everything the same in your working setup, but use the default PCIe boot mode instead of using IBL update to see if the EVM could be recognized.

    3. I think your understanding is correct.

    4. The 32MB region is the BAR window size of C66x PCIe module, which is decided by each of the BAR mask register. Please refer to section 2.6.3 in the PCIe user guide for the details of BAR and BAR mask registers. I am not sure if the mapping region of BAR registers are programmed to L2/DDR memory regions by the boot code or not. But the user could re-program those BARs and inbound translation registers after the boot based on their application. 

    5. The boot loader user guide is a good starting point. And also there are a couple documents in the MCSDK folder for the boot process, such as "README.pdf" in C:\ti\mcsdk_2_01_01_04\tools\boot_loader\examples\pcie\docs, which talks about PCIe boot procedure.

  • 0 in reply to Steven Ji
    Expert 1200 points

    Steven, thanks for these answers.

    1) I hope this will not happen with the SBC (single board computer) that we are planning to use.

    2) I will try with a different version of the chip (our own product). We only have one EVM (old version) and even though I am set up to boot from PCIe, the FPGA asserts the pins on the DSP. I do not think I have any control over it.

    3) My understanding was not correct but you provided me the answer. The EEPROM code just fix issues with PLL lock. I guess the ROM boot set the initialization table I was referring to.

    4) Thanks I will go to read these registers and understand the mapping. What I am sure about is that BAR0 is mapped to the PCIe control registers because I played with it. The other BAR, I do not know and each reading, the values seem to be changing (which is very strange).

    5) This is where I started from but all these example seem to apply to linux. I could not get them to work but that will be the subject of another post.

    Thanks so much for your prompt answers and help.

    Aymeric