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question about dual SMSC9118 driver

Jun LI2
Prodigy 160 points

Hi,  I am using the ti wince6.0 bsp(BSP_WINCE_ARM_A8_01_00_00). In my target board,  dual SMSC9118 chips were used, a few question for my platform is as below:

1. IRQ pin assignment and functionality. Two independent GPIO pins were used to function as interrupt sources for SMSC9118.But how to make changes accordingly in TI's driver and OS. It should be registry related,right?

How to port  the driver to make the chip work?Which part in the source code I should modify?

Best Regards

L.J.

  • 0
    Prodigy 160 points

    Hi, Can anybody help me!

  • 0 in reply to Jun LI2
    Guru 31670 points

    Jun,

    I cannot suggest the exact place where exactly to modify. Also I don't have the source code with me. From a high-level I can suggest the changes required.

    1. Since both controllers are connected to different GPMC chip selects, you can try to enable one by one and see whether it works independent.

    2. According to address where each of the controllers are mapped to, you've to set the physical base address for the SMSC controller base address. 

    3. Similarly you've to change the GPIO irq number accordingly. It depends on the driver code, from where it is taking these parameters(base address and irq). If the driver is neatly written, it should be reading this info from a registry entry.

    4. After testing independent behavior, you've to make it work simultaneous, by instantiating two SMSC driver instances, which can easily be performed by creating multiple registry entries.

  • 0 in reply to Renjith Thomas
    Prodigy 160 points

    Hi Renjith,

    Thanks for your expert solutions, they are all helpful.

    I would like to present the registry entry and other details. Because i have no idea about the interrupt settings in this driver, like where the IST is.

    [HKEY_LOCAL_MACHINE\Comm\SMSC91181\Parms]
        "BusNumber"=dword:0
        "BusType"=dword:0
    "SysIntr"=dword:10    ; FIXED in the OAL to SYSINTR_FIRMWARE + 0
        "IoBaseAddress"=dword:15000000  ; ETHERNET_BASE (Physical Addr)
        "PhyAddress"=dword:20           ; PHY address (0x20:Auto, 0xFF:Internal)
        "RxDMAMode"=dword:0             ; 1-DMA, 0-PIO
        "TxDMAMode"=dword:0             ; 1-DMA, 0-PIO
        "FlowControl"=dword:1           ; 1-Enabled, 0-Disabled
        ; LinkMode will replace Duplex, Speed and FlowControl
        ; bit7: RESERVED, bit6: ANEG, bit5: ASymmetric Pause, bit4: Symmetric Pause
        ; bit3: 100FD, bit2: 100HD, bit1: 10FD, bit0: 10HD
        "LinkMode"=dword:7F
        ; Setting Auto-Mdix Status
        ; 0: Override strap, Disable Auto Mdix, straight cable
        ; 1: Override strap, Disable Auto Mdix, CrossOver cable
        ; 2: Override strap, Enable Auto Mdix
        ; Others or No Keyword: AutoMdix controlled by strap
        "AutoMdix"=dword:4
        ; INT_CFG value applied following HW_CFG_SRST_.  Note valid settings below:
         "IntCfg"=dword:0               ; bit4:IRQ_POL, bit0:IRQ_TYP (11/10/1/0)

    ...

    About IoBaseAddress item, i could configure it according to GPMC workaround.

    About sysIntr item, this demontration mentioned that it was FIXED in the OAL to SYSINTR_FIRMWARE + 0. My question is how to add another sysintr for the second smsc9118 chip, should i still used this SysIntr"=dword:10? if not, should i directly replace it with another random value?

  • 0 in reply to Jun LI2
    Guru 31670 points

    Jun,

    To comment on the SysIntr number I need to see the driver code. SysIntr is a logical interrupt number mapped to a particular hardware interrupt number. There are two ways of creating sysintr, one is statically mapped, and another is dynamically. If the BSP is a neatly written BSP then it will be dynamic, except for few reserved SYSINTRs like timer etc. 

    I'm not really sure in your case how sysIntr is getting used. Can you search in your code for sysintr and see how it is used?