I use beaglebone to learn for McASP control, with transmit burst mode.
Then base on my program, I can measure correct serial stream data "0x5A085A66" from AXR0, and correct frame signal from FSX.
But I always meet frame sync error due to XSTAT-bit1=1 after Release the Transmit State machine and frame sync generator from reset.
Please check the following my code, how I can correct it.
int main(void) {
MCASP0ModuleClkConfig();
MCASP0PinMuxSetup();
McASPTxReset(SOC_MCASP_0_CTRL_REGS);
McASPTxFmtMaskSet(SOC_MCASP_0_CTRL_REGS, (1 << 32) - 1);
McASPTxFmtSet(SOC_MCASP_0_CTRL_REGS, (MCASP_TX_PAD_WITH_0 | MCASP_TX_BITSTREAM_MSB_FIRST | MCASP_TX_SYNC_DELAY_1BIT | (32 >> 2) | ((32/2 -1) << MCASP_XFMT_XSSZ_SHIFT) | MCASP_TX_BUF_PERICONFIGPORT));
/* Configure the frame sync. Burst mode = 0 */
McASPTxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 0, MCASP_TX_FS_WIDTH_WORD, MCASP_TX_FS_INT_BEGIN_ON_RIS_EDGE);
McASPTxClkCfg(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_INTERNAL, 0, 0);
McASPTxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_POL_RIS_EDGE);
McASPTxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLKCHCK_DIV32, 0x00, 0xFF);
/* Disable synchronization of RX and TX sections */
McASPTxRxClkSyncDisable(SOC_MCASP_0_CTRL_REGS);
/* Enable the transmitter/receiver slots */
McASPTxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, 1);
McASPSerializerTxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_TX);
McASPPinMcASPSet(SOC_MCASP_0_CTRL_REGS, 0xFFFFFFFF);
McASPPinDirOutputSet(SOC_MCASP_0_CTRL_REGS, MCASP_PIN_AXR(MCASP_XSER_TX));
McASPPinDirOutputSet(SOC_MCASP_0_CTRL_REGS, MCASP_PIN_ACLKX | MCASP_PIN_AFSX);
McASPPinDirInputSet(SOC_MCASP_0_CTRL_REGS, MCASP_PIN_AFSR | MCASP_PIN_ACLKR | MCASP_PIN_AXR(MCASP_XSER_RX));
McASPTxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_TX_CLK_INTERNAL);
// Activate the serializers
McASPTxSerActivate(SOC_MCASP_0_CTRL_REGS);
McASPTxBufWrite(SOC_MCASP_0_CTRL_REGS, 0, 0x5A085A66);
while(McASPTxStatusGet(SOC_MCASP_0_CTRL_REGS) & MCASP_TX_STAT_DATAREADY);
// Activate the state machines
McASPTxEnable(SOC_MCASP_0_CTRL_REGS);
while(1);
}
Best Regards,
Alan