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Interrupt not working on StarterWare of OMAP-L138

Other Parts Discussed in Thread: OMAP-L138

Hi everyone, I’m a new comer here. I got an interrupt problem on my LogicPD experiment Kit, it would be great if someone give me a hand. Thanks in advance.

Environment:
I downloaded OMAP-L138 StarterWare, there are codes for both the ARM core and DSP core in the installation folders, some codes are shared while others are separated in two folders called “armv5” and “c674x”, I guessed “armv5” is for the ARM code and “c674x” is for the DSP core, right? I’m develop on the ARM core for now, so I pick all the shared files and “armv5” files out, and create a CCS4 project with them. I had a hard time to make them build through… By the way, this is the cmd file in the project:

------------------------------------------------------------

linker.cmd:

-stack           0x00000800
-heap            0x00000800

MEMORY
{
   vec:    ORIGIN = 0x11800000  LENGTH = 0x00000400  
   dsp_l2_ram:      ORIGIN = 0x11800400  LENGTH = 0x0003FC00
   shared_ram:      ORIGIN = 0x80005000  LENGTH = 0x00010000
   external_ram:    ORIGIN = 0xC0000000  LENGTH = 0x04000000
   arm_local_rom:   ORIGIN = 0xFFFD0000  LENGTH = 0x00010000
   arm_local_ram:   ORIGIN = 0xFFFF0000  LENGTH = 0x00002000
}

SECTIONS
{
   .vectors    > vec 
   .text       > shared_ram
   .const      > shared_ram
   .bss        > shared_ram
   .far        > shared_ram
   .switch     > shared_ram
   .stack      > shared_ram
   .data       > shared_ram
   .cinit      > shared_ram
   .sysmem     > shared_ram
   .cio        > shared_ram
}

----------------------------------------------------

Problem:
I start from the simplest one “UartEcho”, and debug the code with XDS560plus emulator. When the code runs, it can print out messages to COM1 on my PC, but when I send characters from PC to the board back, nothing happens. I put a breakpoint in the interrupt services routine, it doesn’t get hit.

Some Research:
When I check the code in StarterWare, I didn’t find the interrupt file “vectors.asm” for ARM core. (there is one for DSP core). Instead it defines a function pointer array to obtain the ISR addresses dynamically at runtime:
    static void (*fnRAMVectors[NUM_INTERRUPTS])(void);

and assign the ISR Table Address to VBR :
    HWREG(SOC_AINTC_0_REGS + AINTC_VBR) = (unsigned int)fnRAMVectors;

On client side, it do some interrupt initialize and register the ISR:

    /* Initialize the ARM Interrupt Controller(AINTC). */
    IntAINTCInit();

    /* Enable IRQ in CPSR.*/     
    IntMasterIRQEnable();

    /* Enable the interrupts in GER of AINTC.*/
    IntGlobalEnable();

    /* Enable the interrupts in HIER of AINTC.*/
    IntIRQEnable();

    /* Registers the UARTIsr in the Interrupt Vector Table of AINTC. */
    IntRegister(SYS_INT_UARTINT2, UARTIsr);

    /* Map the channel number 2 of AINTC to UART2 system interrupt. */
    IntChannelSet(SYS_INT_UARTINT2, 2);

    IntSystemEnable(SYS_INT_UARTINT2);

Quesiont:

So what should the problem be? Isn’t a vector.asm necessary?

Thanks again for reading all of this; I’m look forward to your replay.

  • Is anyone there can help me? Or did I write too much?

    Infact, the problem is simple, I just want to know why the ARM interrupt controller doesn't work?

  • Zhang,

    I'm not really sure about the StarterWare code structure. But you can check the following registers for understanding whether interrupts are enabled or not.

    1. ARM's CPSR register for IRQ bit?

    2. ARM interrupt controller Interrupt enable register for your UART controller's bits.

    3. Check your UART controller registers for enabling RX interrupts. 

  • Hi Renjith Thomas -

    Thanks very much for the post. And exactly as you said, my IRQ bit in CPSR is 1 which disabled the IRQ interrupt.

    But i found that i can only modiy the value of CPSR in supervior mode.

    The technical reference manual said "use software interrupt to enter supervisor mode", and list a table of exception vector table, one of the row like this:

    -----------------------------------------------------------------------------------------------------
    Vector Offset Addr     Exception                   Mode on entry                        I bit state of entry              F bit on entry
    8h                                Software                      interrupt Supervisor            Set                                       Unchanged
    ------------------------------------------------------------------------------------------------------

    I just don't konw what does this mean and how to enter the supervisor mode. Thanks for helping.

  • Zhang,

    I'm not really sure about Starterware architecture. In my opinion it should have been running in SVC mode. From user mode to enter SVC mode you have to issue SWI instruction. This is how system calls are implemented in High Level OS. 

    To enable interrupts there might be some interrupt_enable() function should be available Starterware. Also can you trace the entire code from the starting point, and see the state changes in CPSR registers.

  • Hi Renjith -

    Thanks a lot, my problem has been resolved. Here is a code package that shows how to gain SVC mode and modify the CPSR.

    http://processors.wiki.ti.com/index.php/QuickStartOMAPL1x_rCSL

  • Hello Zhang,

    how you solved the problem? i have encounter the same problem, i can't call the UartISR during host received data from UART port, how you init he Interrupt handling?

    Thank you.

  • Hi All,

    I have same issue and unable to generate any system interrupt even just running the sample code for OMPL138 provided by TI. Thanks for your prompt response.