Hello,
in a project, we use a CPU module with an OMAP3530 on a daughterboard, that has a TVP5146 video decoder. In order to capture video via ISP, we configure the ISP pipeline by connecting its entities (pads are in square brackets) like this:
"tvp514x" [0] --> [0] "CCDC" [1] --> [0] "CCDC output"
For our product, the CPU module will be used on our custom daughterboard, which does not have a TVP5146 decoder. Instead, the video data will be sent from a FPGA directly to the OMAP. If we understand this correctly, the video signal will lie against the CCDC subdevice.
How would we configure the ISP pipeline in this hardware setup with no TVP chip available? By using a FPGA (already does some pre-processing, we can output any possible format (even simulate the TVP chip). What would you recommend?
Kind regards,
Andreas
