1080i Mosaic problem

Jenson Chin

Prodigy 60 points

Dear Supporter,

We encountered a problem and it looks like this problem relates to HDVPSS.

My usecase is

Capture: 8CH 1080i (1920*540)
Display: HDMI 1080p/60fps

As you can see in the first snapshot, it's OK when I display one of the eight channels.

As shown in 2nd and 3rd, obviously, certain part of the picture is lost (it looks like DM8168 VPSS cut the right part off but it's ok in height).

The RDK version is 3.0.1.3.

Thanks for your help.

over 12 years ago

0 Brijesh Jadav over 12 years ago

TI__Guru**** 478175 points

hi,

Can you please print the statistics by pressing 'i' on the console and share us console log?

Thanks,

Brijesh Jadav

0 Badri Narayanan over 12 years ago in reply to Brijesh Jadav

TI__Guru 59700 points

Are you using PG1.1 Netra Silicon ? If so max width can be only 960 when input is 422 . You can either migrate to PG2.0 netra silicon or use NSF link after capture to convert 422I to 420

0 Jenson Chin over 12 years ago in reply to Badri Narayanan

Prodigy 60 points

Dear Badri,

I am sure my silicon version is PG2.0. So it would not be an issue.

As the log, see below:

[m3vpss ] *** [SWMS0] Mosaic Parameters ***

[m3vpss ]

[m3vpss ] Output FPS: 29

[m3vpss ]

[m3vpss ] ----------------------------------------------------------------------------------------------------------------------------------------------------------------------

[m3vpss ] 0 | 0 | 0, 0 | 1920 x 270 | 3840 / 3840 | NON-TILED | 0, 0 | 640 x 360 | 3840 / 0 | NON-TILED | ON | 0 | 420SP | OFF |

[m3vpss ] 1 | 1 | 0, 0 | 1920 x 270 | 3840 / 3840 | NON-TILED | 640, 0 | 640 x 360 | 3840 / 0 | NON-TILED | ON | 0 | 420SP | OFF |

[m3vpss ] 2 | 2 | 0, 0 | 1920 x 270 | 3840 / 3840 | NON-TILED | 1280, 0 | 640 x 360 | 3840 / 0 | NON-TILED | ON | 0 | 420SP | OFF |

[m3vpss ] 3 | 3 | 0, 0 | 1920 x 270 | 3840 / 3840 | NON-TILED | 0, 360 | 640 x 360 | 3840 / 0 | NON-TILED | ON | 0 | 420SP | OFF |

[m3vpss ] 4 | 4 | 0, 0 | 1920 x 270 | 3840 / 3840 | NON-TILED | 640, 360 | 640 x 360 | 3840 / 0 | NON-TILED | ON | 0 | 420SP | OFF |

[m3vpss ] 5 | 5 | 0, 0 | 1920 x 270 | 3840 / 3840 | NON-TILED | 1280, 360 | 640 x 360 | 3840 / 0 | NON-TILED | ON | 0 | 420SP | OFF |

[m3vpss ] 6 | 6 | 0, 0 | 1920 x 270 | 3840 / 3840 | NON-TILED | 0, 720 | 640 x 360 | 3840 / 0 | NON-TILED | ON | 0 | 420SP | OFF |

[m3vpss ] 7 | 7 | 0, 0 | 1920 x 270 | 3840 / 3840 | NON-TILED | 640, 720 | 640 x 360 | 3840 / 0 | NON-TILED | ON | 0 | 420SP | OFF |

[m3vpss ] 8 | 255 | 0, 0 | 352 x 132 | 1408 / 1408 | NON-TILED | 1280, 720 | 640 x 360 | 3840 / 0 | NON-TILED | ON | 0 | 422I | OFF |

Thanks for your help!

0 Badri Narayanan over 12 years ago in reply to Jenson Chin

TI__Guru 59700 points

Can you try with the attached patch.Please update the following lines in HDVPSS package(hdvpss\hdvpss_01_00_01_37\packages\ti\psp\vps\core\src\vpscore_scWrbkPath.c)

If issue is not resolved please share the full console logs starting from application start.

Fullscreen 0820.0001-Fixed-horizontal-scalling-issue-when-output-width-is.txt Download

From 9b642b34a335baa094c5c635a6bd6765834fef1f Mon Sep 17 00:00:00 2001
From: Arun Menon <arun-menon@ti.com>
Date: Wed, 31 Oct 2012 15:38:38 +0530
Subject: [PATCH]  - Fixed horizontal scalling issue when output width is less than 0.5 the input width

---
 packages/ti/psp/vps/core/src/vpscore_scWrbkPath.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/packages/ti/psp/vps/core/src/vpscore_scWrbkPath.c b/packages/ti/psp/vps/core/src/vpscore_scWrbkPath.c
index f3ea211..8a846f7 100755
--- a/packages/ti/psp/vps/core/src/vpscore_scWrbkPath.c
+++ b/packages/ti/psp/vps/core/src/vpscore_scWrbkPath.c
@@ -1552,8 +1552,8 @@ static UInt32 swpProgramReg(Vcore_SwpHandleObj *hObj,
     scHalCfg->cropHeight = chObj->params.srcCropCfg.cropHeight;
     scHalCfg->outFrameMode = (Vps_ScanFormat)
         chObj->coreFmt.fmt.scanFormat;
-    //scHalCfg->hsType = VPS_SC_HST_AUTO;
-    scHalCfg->hsType = VPS_SC_HST_POLYPHASE;
+    scHalCfg->hsType = VPS_SC_HST_AUTO;
+    //scHalCfg->hsType = VPS_SC_HST_POLYPHASE;
     scHalCfg->nonLinear = chObj->params.scCfg.nonLinear;
     if (FALSE == scHalCfg->nonLinear)
     {
@@ -1567,8 +1567,8 @@ static UInt32 swpProgramReg(Vcore_SwpHandleObj *hObj,
     scHalCfg->defConfFactor = 0;
     scHalCfg->biLinIntpType = VPS_SC_BINTP_MODIFIED;
     scHalCfg->enableEdgeDetect =  chObj->params.scCfg.enableEdgeDetect;
-    //scHalCfg->hPolyBypass = TRUE;
-    scHalCfg->hPolyBypass = FALSE;
+    scHalCfg->hPolyBypass = TRUE;
+    //scHalCfg->hPolyBypass = FALSE;
     scHalCfg->bypass = chObj->params.scCfg.bypass;
 
     /* Below three fields are not user programmable */
-- 
1.7.0.4

0 Jenson Chin over 12 years ago in reply to Badri Narayanan

Prodigy 60 points

Dear Bradi,

It works with the patch!

Thanks again!

Processors

Processors forum

1080i Mosaic problem