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How can I be sure data written to uncached SDRAM is ready for reading by DMA on a DM6443?

(I'm posting in the DaVinci forum because this doesn't feel like a compiler question and because I'm using a DM6443.)

I want to do this on the 64x+:

  1. Write data to uncached SDRAM

  2. Wait until I am sure the data is actually in SDRAM

  3. Start DMA to copy that data

But I don't know what to do in step #2 to make the process reliable. The ideas I've had are:

  a) Do nothing. This usually works in practice, but not always. If the last thing written is 16 bits (STH) at the start of the area I ask DMA to copy, DMA sometimes copies the data with the first 16 bits as though my write wasn't there (yet). I think that may be because of the L1D write buffer, described in spru871k, section 3.5.3. (I figure that if an area is marked as not cached, that means any write misses both L1D and L2, and 3.5.3 seems to say that anything that misses L1D goes in the write buffer. Right?)

  b) Insert an instruction to drain the write buffer. I can't find one. But maybe there is one.

  c) Add enough dummy writes to uncached SDRAM to be sure that the write I actually wanted is completed. How many writes is enough? I figured four should suffice since spru871k, section 3.5.3 says the write buffer is four deep. But in practice that doesn't seem to be enough. Perhaps the rules are more complicated than that. How many is enough?

  d) Add a dummy read from uncached SDRAM. 3.5.3 seems to say that a read forces a stall until the write buffer is empty. ("Reads that miss L1D are not processed as long as the write buffer is not empty.") This seems to work in practice.

  e) Change step 1: don't write to an uncached address. Write to a cached address and then flush the region. I'm not sure if that's enough. I haven't tried it either. Nor have I tried writing to L1D ram.

Matt

(Edit: clarified that I'm doing this on the 64x+ and not on the ARM)