text section placement of Image Processing Demo

Koray Korkmazer

Hi All,

In the Image processing demo of MulticoreSDK packet,
'.text' section is placed on the MSMCSRAM_MASTER at the master project (which is defined in the master cfg file ) and
'.text' section is placed on the MSMCSRAM_SLAVE at the slave project (which is defined in the slave cfg file );

But in the MAD Utility part of the same demo,
'.text' section is placed at DDR3-ROMFS partition in the 'deployment_template_evmc6678l.json' file which is defined as a DDR3 memory .

Does that mean that when we run the demo via CCS in no-boot mode the '.text' section will be placed in MSMC SRAM and
in NAND-NOR boot mode the '.text' section will be placed in DDR ?
If the answer is yes, why is '.text' section placement is different in no-boot mode and other boot modes ? Isn't it possible to place it in the same region both in the cfg files and in the json file ?

Regards,
Koray.

over 13 years ago

0 Koray Korkmazer over 13 years ago

Intellectual 820 points

Also, some other observations:

There is not MSMC_IPC and MSMC_SLAVE partitions in the 'deployment_template_evmc6678l.json' file which exist at the project's cfg file. What I understand based this observation is the project's memory configuration and related prelink mode configuration file is totally different. There is not any relation between these 2 files.
Demo's 'Bypass Prelink Mode' image does not work. I built both the Master and Slave projects statically(removed the -r and dynamic link option). Then I built the 'Bypass Prelink Mode' image by means of "build_mad_image_prelink_bypass.bat" file. I changed the cgt path in the file beforehand. Then I flashed the resultant image to the NAND. When I boot the device, I can see the IBL is working. But NAND image does not start. The prelink mode image was starting and running successfully when booted from NAND but 'Bypass Prelink Mode' image does not.
Any idea ?

Regards,
Koray.

0 Ivan Pang over 13 years ago in reply to Koray Korkmazer

TI__Intellectual 2220 points

Hi Koray,

You are right that the memory mapping may be different in Prelink Mode. You would have to modify the deployment .json file to cater your needs. The boot mode does not affect the memory mapping. The prelink MAD image, however, does.

For the Bypass Prelink Mode, have you tried the default image that came with BIOS-MCSDK? The default image was built with the prelink bypass option. I will need a little bit more information to help you debug; here is short checklist of questions:

1) Have you verified that your rebuilt Master and Slave projects work in CCS? This just verifies that we have a valid application.

2) When the Bypass Prelink Mode image fails, can you connect to core0 of your device? If so, can you tell me where the PC address is at?

3) What versions of CCS, CGT, MCSDK and what EVM are you using?

4) Have you tried to debug the image you created without running through NAND boot? Refer to the bottom of this guide http://processors.wiki.ti.com/index.php/MAD_Utils_User_Guide - this imitates what should happen at boot time.

If possible, can you provide us with your .json and .out files? I can try to debug it on my end; the bypass Prelink Mode for the Image Processing demo should work by default.

-Ivan

0 Koray Korkmazer over 13 years ago in reply to Ivan Pang

Intellectual 820 points

Hi Ivan,

I noticed something.
The default version of "deployment_template_evmc6678l_bypass_prelink.json" file (which is located at ..\mcsdk_2_00_09_21\demos\image_processing\utils\mad\evmc6678l\config-files) is designed for C6670. It is specified in the "deviceName" property of the file and also you can understand it from the number of the cores available which is just 4.
I think there is a mistake in this file.
Could you send the correct version of the file ?

And my tool versions are:

CCS: 5.2.0.00069
CGT: 7.3.4
MCSDK: 2.00.09.21
EVM: 6678L (XDSv100 type emulator)

Regards,
Koray.

0 Ivan Pang over 13 years ago in reply to Koray Korkmazer

TI__Intellectual 2220 points

Koray,

I believe that might have been a copy&paste error on our side. We have since fixed it in the newer versions of BIOS-MCSDK. You can grab it here: http://software-dl.ti.com/sdoemb/sdoemb_public_sw/bios_mcsdk/latest/index_FDS.html. Be sure to also grab and use CGT 7.4 when upgrading to this version.

Attached here should be the correct version of the deployment template. (renamed to .txt file for uploading reasons)

-Ivan

Fullscreen 4670.deployment_template_evmc6678l_bypass_prelink.txt Download

{
	"deviceName" : "C6678",
	
	"partitions" : [
		{
			"name"			: "load-partition",
			"vaddr"			: "0x9e000000",
			"size"			: "0x2000000",
			"loadPartition" : true 
		}
	],
	
	"applications" : [
		{
			"name"			 : "master",
			"fileName"       : "../../../ipc/evmc6678l/master/Debug/image_processing_evmc6678l_master.out",
			"allowedCores"   : [0]
		},
		{
			"name"			 : "slave",
			"fileName"       : "../../../ipc/evmc6678l/slave/Debug/image_processing_evmc6678l_slave.out",
			"allowedCores"   : [1,2,3,4,5,6,7]
		}
	],
	
	"appDeployment" : [
		"master",
		"slave",
		"slave",
		"slave",
		"slave",
		"slave",
		"slave",
		"slave"
	]
}

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text section placement of Image Processing Demo