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UCD90160 + C6678 + Power Sequencing

Wenjun Huang
Expert 1770 points

Other Parts Discussed in Thread: UCD90160, TMS320C6678

I am intending to use UCD90160 to power sequence C6678.

I am referencing design from the C6678 EVB whereby they use a FPGA to power sequence the C6678. I am replacing the FPGA power sequencing function with the UCD90160 power sequencer.

For the C6678 reset lines (PORz, RESETFULLz, RESETz, LRESETz), they are pulled low in the C6678 EVB. I believe the reason for that is that the C6678 will be reset until the voltage is up and running whereby the FPGA will deassert the reset lines, then C6678 will get out of reset. This is different from other chip whereby the reset lines is pulled high (deasserted) and asserted only when required by signals.

For the UCD90160, its output can be open-drain or push-pull. I am intending to configure the output to be open-drain so that I could tie it to 1.8V (the push-pull configuration will force the output to be 1.8V). However, if that is the case, I will need to provide a pullup resistor for open-drain configuration. This will create a problem if the open-drain output of UCD90160 is connected to C66 RESET line as the line will be pulled up to 1.8V and pull down to ground by resistors. This will create a middle voltage when the open-drain output is not driving, which is not desirable.

In the UCD90160, there is this part which talks abt "During reset, the GPIO pins are high-impedance expet for FPWM/GPIO pins 17-24 which are driven low." on p22. Could I make use of this fact to connect the FPWM output to the C66 reset line without a pull down resistor as internal to UCD90160, it is pull down. I would pull the reset line to 1.8V instead as I am configuring the UCD90160 to be an open-drain output.

Will this work?

  • 0
    TI__Mastermind 46460 points

    Wenjun,

    #1 Replacing the FPGA on the C6678 EVM with a sequencer from the UCD family is a good plan.

    #2 The PORz, RESETFULLz and RESETz inputs must meet the sequencing requirements shown in the Section 7.2 of the TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual (SPRS691C).  These must all be low when the power supplies to the C6678 begin ramping.  If RESETz is not used by the system, it can be pulled up to DVDD18.  PORz and RESETz must be held low while all C6678 supplies ramp and they then must be low for the required time periods as shown in the Data Manual.

    #3 The open drain configuration can be used to drive the reset inputs.  However, the UCD90160 must be powered and operational before any of the C6678 supplies begin ramping so that it holds them low.  Additionally, it must never drive any of these reset inputs high until after the supplies are valid.

    #4 Correct, driving them low through an open-drain output is valid and will mean that an external resistor is not needed.  Again, this solution requires the UCD90160 to be powered and operational before the C6678 supplies begin operating.

    Tom