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dmtimer single shot pwm

I'm trying to use one of the timers of the DM8148 to generate a single shot pulse of programmable width. My problem is that the PWM functionality does not seem to work right in single shot mode (autoreload off). If I set the timer up as shown below, I see a short pulse when the timer expires, where I expect a longer pulse. If I turn off the toggle bit in set_pwm, I see 2 pulses as expected. Is this related to the "First match event ignored" note in figure 23-6 of SPRUGZ8B? If so is there a workaround for this?

omap_dm_timer_set_prescaler( up->rs485_timer, 0);

omap_dm_timer_set_pwm( up->rs485_timer, 0 /*def_on*/, 1 /*toggle*/, OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE );

omap_dm_timer_set_match(timer, 1 /*enable*/, 0xFFFFD005);

omap_dm_timer_write_counter(timer, 0xFFFFD000);
omap_dm_timer_start(timer);

  • Hello,

    I am sorry; what is the software release that you are using here. Thank you.

    BR

    Vladimir

  • We are using DVRRDK 3.00.00.00, with TI81XX-LINUX-PSP-04.04.00.01. I found a workaround that seems reliable and makes sense as far as the timer behavior is concerned. What I did is to set the reload value for the timer very close to to the overflow value, (reload = 0xFFFFFFF0, overflow=0xFFFFFFFF), and when I need a pulse I move the match point to just ahead of my new counter value, then set the counter value. This depends on a behavior that I have not seen documented but that seems to make sense. It appears that in toggle mode , what actually happens is that when that match occurs, the value of the output is not toggled, but forced to "on", and when an overflow occurs it is forced to "off", with the values of on and off controlled by the output polarity in the control register. So by setting up the autoreload so that the load value is after the match value, the output will stay off most of the time, only tuning on when I modify the timer value directly to generate a pulse. 

    omap_dm_timer_set_pwm(timer, 1 /* def_on*/, 1 /*toggle*/,
    OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE );
    omap_dm_timer_set_load( timer, 1, 0xFFFFFFF0);

    /* later */

    omap_dm_timer_set_match(timer, 1 /*enable*/, newcounter + 5 );

    omap_dm_timer_write_counter(timer, newcounter);

  • Hello,

    I'll try to involve someone here to help. Thank you.

    BR

    Vladimir

  • Thats ok, the workaround I described is acceptable for my use case.

  • I am glad that the issue is solved. Thank you very much for the feedback.

    BR

    Vladimir