Problems when loading VICP/VPSS/DSP firmware

The firmware size are different because we run strip utility after building to strip out debug info. Can you let us know from which folder you loaded the firmware.There is one under dvr_rdk/bin/ti816x/firmware and one under dvr_rdk/../target/rfs_816x/opt/dvr_rdk/ti816x/firmware. The under target will have symbols stripped.

Regarding the load issue did you make any change when building. Is it a 2G memory map build you are trying. Pls share your rules.make and kernel bootargs. Pls share full logs from boot onwards to load firmware.

Hello, Badri

    Thanks for your reply.

    OK, let me describe the firmware files I tested more specifically.

    There are 3 case in my test:

case 1:

     There is already file system existing in the NAND flash when we got DVRRDK box.

     We got the firmware files in /opt/dvr_rdk/ti816x/firmware

      => Test result: Good

case 2:

     I downloaded DM8168_DVRRDK_V03.00.00.00 package and un-tar.

     There already exist prebuilt firmware files in DM8168_DVRRDK_V03.00.00.00/target/rfs_816x/opt/dvr_rdk/ti816x/firmware

      => Test result: Fail

case 3:

     I build the firmware by myself.

     The files are in DM8168_DVRRDK_V03.00.00.00/dvr_rdk/bin/ti816x/firmware

      => Test result:  Fail

  All three cases are tested with my-built kernel which is loaded through TFTP, and file system thr NFS.

  I did not make any modification in firmware source code when building.

  The Rules.make is attached for your reference.  (I rename it as Rules.txt when post.)

# Copyright Texas Instruments
ifeq ($(dvr_rdk_PATH), )

# Board type can be one of the following
#	1. DM816X_DVR
#	2. DM816X_EVM
#	3. DM814X_EVM
#	4. DM810X_EVM
#	5. DM810X_DVR

ifeq ($(DVR_RDK_BOARD_TYPE ), )
  DVR_RDK_BOARD_TYPE := DM816X_DVR
endif

# Default build environment, windows or linux
ifeq ($(OS), )
  OS := Linux
endif

dvr_rdk_RELPATH = dvr_rdk

ifeq ($(OS),Windows_NT)
  dvr_rdk_BASE     := $(CURDIR)/..
  TI_SW_ROOT       := D:/ti_software
endif

ifeq ($(OS),Linux)
  dvr_rdk_BASE     := $(shell pwd)/..
  TI_SW_ROOT       := $(dvr_rdk_BASE)/ti_tools
  SC_SCRIPTS_BASE_DIR := /datalocal/user/ipnc_tools/Coding_Guidelines_for_RDK/Tools/scripts
endif

dvr_rdk_PATH     := $(dvr_rdk_BASE)/$(dvr_rdk_RELPATH)
# CODEGEN_PATH_A8  := /opt/CodeSourcery  # John override
CODEGEN_PATH_A8  := /home/john/CodeSourcery/Sourcery_G++_Lite
CODEGEN_PREFIX   := $(CODEGEN_PATH_A8)/bin/arm-none-linux-gnueabi-
CODEGEN_PATH_DSP := $(TI_SW_ROOT)/cgt_dsp/cgt6x_7_3_5/
CODEGEN_PATH_M3  := $(TI_SW_ROOT)/cgt_m3/cgt470_4_9_5/

bios_PATH        := $(TI_SW_ROOT)/bios/bios_6_33_05_46
xdc_PATH         := $(TI_SW_ROOT)/xdc/xdctools_3_23_03_53

syslink_PATH     := $(TI_SW_ROOT)/syslink/syslink_2_10_02_17_patched
hdvpss_PATH      := $(TI_SW_ROOT)/hdvpss/hdvpss_01_00_01_37_patched

ifeq ($(DVR_RDK_BOARD_TYPE),DM810X_EVM)
syslink_PATH     := $(TI_SW_ROOT)/syslink/syslink_2_10_02_17_ti810x_patched
endif

ifeq ($(DVR_RDK_BOARD_TYPE),DM810X_DVR)
syslink_PATH     := $(TI_SW_ROOT)/syslink/syslink_2_10_02_17_ti810x_patched
endif

iss_PATH		 := $(TI_SW_ROOT)/iss/iss_02_00_00_08

ipc_PATH         := $(TI_SW_ROOT)/ipc/ipc_1_24_03_32
fc_PATH          := $(TI_SW_ROOT)/framework_components/framework_components_3_22_02_08
xdais_PATH       := $(TI_SW_ROOT)/xdais/xdais_7_22_00_03
h264dec_DIR      := $(TI_SW_ROOT)/codecs/REL.500.V.H264AVC.D.HP.IVAHD.02.00.05.00
h264enc_DIR      := $(TI_SW_ROOT)/codecs/REL.500.V.H264AVC.E.IVAHD.02.00.02.02
h264dec_PATH     := $(h264dec_DIR)/500.V.H264AVC.D.HP.IVAHD.02.00/IVAHD_001
h264enc_PATH     := $(h264enc_DIR)/500.V.H264AVC.E.IVAHD.02.00/IVAHD_001
jpegdec_DIR      := $(TI_SW_ROOT)/codecs/REL.500.V.MJPEG.D.IVAHD.01.00.05.00
jpegenc_DIR      := $(TI_SW_ROOT)/codecs/REL.500.V.MJPEG.E.IVAHD.01.00.04.00
jpegdec_PATH     := $(jpegdec_DIR)/500.V.MJPEG.D.IVAHD.01.00/IVAHD_001
jpegenc_PATH     := $(jpegenc_DIR)/500.V.MJPEG.E.IVAHD.01.00/IVAHD_001
mpeg4dec_DIR     := $(TI_SW_ROOT)/codecs/REL.500.V.MPEG4.D.IVAHD.01.00.08.00
mpeg4dec_PATH    := $(mpeg4dec_DIR)/500.V.MPEG4.D.ASP.IVAHD.01.00/IVAHD_001
hdvicplib_PATH   := $(TI_SW_ROOT)/ivahd_hdvicp/hdvicp20
linuxdevkit_PATH := $(TI_SW_ROOT)/linux_devkit/arm-none-linux-gnueabi
edma3lld_PATH    := $(TI_SW_ROOT)/edma3lld/edma3_lld_02_11_02_04

# Audio framework (RPE) and Codecs
rpe_PATH         := $(TI_SW_ROOT)/rpe/remote-processor-execute
aaclcdec_PATH    := $(TI_SW_ROOT)/codecs/c674x_aaclcdec_01_41_00_00_elf
aaclcenc_PATH    := $(TI_SW_ROOT)/codecs/c674x_aaclcenc_01_00_01_00_elf_patched

ifeq ($(DVR_RDK_BOARD_TYPE),DM810X_DVR)
dvrapp_PATH      := $(dvr_rdk_PATH)/dvrapp/ti810x
endif

ifeq ($(DVR_RDK_BOARD_TYPE),DM816X_DVR)
dvrapp_PATH      := $(dvr_rdk_PATH)/dvrapp/ti816x
#dvrapp_PATH      := $(dvr_rdk_PATH)/dvrapp
endif

live555_PATH     := $(dvr_rdk_PATH)/module/live555
qt_PATH          := /usr/local/Trolltech/QtEmbedded-4.8.1-arm

mtdutils_PATH    := $(TI_SW_ROOT)/mtd_utils
#TFTP_HOME     := /tftproot    # john modify
TFTP_HOME      	 := $(dvr_rdk_BASE)/tftphome
TARGET_FS     := $(dvr_rdk_BASE)/target/rfs
TARGET_FS_DIR := $(dvr_rdk_PATH)/bin/ti816x

ROOTDIR := $(dvr_rdk_PATH)

ifeq ($(DVR_RDK_BOARD_TYPE),DM814X_EVM)
TARGET_FS_DIR := $(dvr_rdk_PATH)/bin/ti814x
TARGET_FS     := $(dvr_rdk_BASE)/target/rfs_814x
endif

ifeq ($(DVR_RDK_BOARD_TYPE),DM814X_DVR)
TARGET_FS_DIR := $(dvr_rdk_PATH)/bin/ti814x
TARGET_FS     := $(dvr_rdk_BASE)/target/rfs_814x
endif

ifeq ($(DVR_RDK_BOARD_TYPE),DM816X_EVM)
TARGET_FS_DIR := $(dvr_rdk_PATH)/bin/ti816x
TARGET_FS     := $(dvr_rdk_BASE)/target/rfs_816x
endif

ifeq ($(DVR_RDK_BOARD_TYPE),DM816X_DVR)
TARGET_FS_DIR := $(dvr_rdk_PATH)/bin/ti816x
TARGET_FS     := $(dvr_rdk_BASE)/target/rfs_816x
endif

ifeq ($(DVR_RDK_BOARD_TYPE),DM810X_EVM)
TARGET_FS_DIR := $(dvr_rdk_PATH)/bin/ti810x
TARGET_FS     := $(dvr_rdk_BASE)/target/rfs_810x
endif

ifeq ($(DVR_RDK_BOARD_TYPE),DM810X_DVR)
TARGET_FS_DIR := $(dvr_rdk_PATH)/bin/ti810x
TARGET_FS     := $(dvr_rdk_BASE)/target/rfs_810x
endif

# Default DDR Size
ifeq ($(DVR_RDK_BOARD_TYPE),DM816X_DVR)
ifeq ($(DDR_MEM), )
#  DDR_MEM := DDR_MEM_1024M   # john modify
  DDR_MEM := DDR_MEM_2048M
endif
endif

ifeq ($(DVR_RDK_BOARD_TYPE),DM816X_DVR)
ifeq ($(DEMOTYPE), )
#  DEMOTYPE = link_api_sd_demo
endif
endif

DVR_RDK_BOARD := DVR_RDK_BOARD_TYPE
ifeq ($(DVR_RDK_BOARD_TYPE),DM816X_DVR)
  DVR_RDK_BOARD := ud816x_dvr
endif
ifeq ($(DVR_RDK_BOARD_TYPE),DM810X_DVR)
  DVR_RDK_BOARD := ud810x_dvr
endif

ifeq ($(CORE), )
  CORE := m3vpss
endif

# Default platform
ifeq ($(PLATFORM), )
  PLATFORM := ti816x-evm
ifeq ($(DVR_RDK_BOARD_TYPE),DM814X_EVM)
  PLATFORM := ti814x-evm
endif
ifeq ($(DVR_RDK_BOARD_TYPE),DM814X_DVR)
  PLATFORM := ti814x-evm
endif
ifeq ($(DVR_RDK_BOARD_TYPE),DM810X_EVM)
  PLATFORM := ti810x-evm
endif
ifeq ($(DVR_RDK_BOARD_TYPE),DM810X_DVR)
  PLATFORM := ti810x-evm
endif
endif

# Default linux mem
ifeq ($(LINUX_MEM), )
ifeq ($(PLATFORM), ti814x-evm)
  LINUX_MEM := LINUX_MEM_128M
endif
ifeq ($(PLATFORM), ti810x-evm)
  LINUX_MEM := LINUX_MEM_128M
else
  LINUX_MEM := LINUX_MEM_256M
endif
endif


# VS_CARD can be one of the following
#	1. WITH_VS_CARD
#	2. WITHOUT_VS_CARD
ifeq ($(PLATFORM), ti814x-evm)
  DDR_MEM := DDR_MEM_512M
  VS_CARD := WITH_VS_CARD
#  VS_CARD := WITHOUT_VS_CARD
endif

# VS_CARD can be one of the following
#       1. WITH_VS_CARD
#       2. WITHOUT_VS_CARD
ifeq ($(PLATFORM), ti810x-evm)
#  DDR_MEM := DDR_MEM_256M
  DDR_MEM := DDR_MEM_512M
  VS_CARD := WITH_VS_CARD
#  VS_CARD := WITHOUT_VS_CARD
endif


# Default profile
ifeq ($(PROFILE_m3video), )
  PROFILE_m3video := release
#  PROFILE_m3video := debug
endif

ifeq ($(PROFILE_m3vpss), )
  PROFILE_m3vpss := release
#  PROFILE_m3vpss := debug
endif

ifneq ($(PLATFORM), ti810x-evm)
ifeq ($(PROFILE_c6xdsp), )
  PROFILE_c6xdsp := debug
endif
endif

# Default klockwork build flag
ifeq ($(KW_BUILD), )
  KW_BUILD := no
endif

USE_SYSLINK_NOTIFY=0

XDCPATH = $(bios_PATH)/packages;$(xdc_PATH)/packages;$(ipc_PATH)/packages;$(hdvpss_PATH)/packages;$(fc_PATH)/packages;$(dvr_rdk_PATH);$(syslink_PATH)/packages;$(xdais_PATH)/packages;$(edma3lld_PATH)/packages;

ifeq ($(PLATFORM),ti816x-evm)
LSPDIR        := $(TI_SW_ROOT)/linux_lsp/linux-psp-dvr-04.04.00.01/src
KERNELDIR     := $(LSPDIR)/linux-04.04.00.01
UBOOTDIR      := $(LSPDIR)/u-boot-04.04.00.01
endif

ifeq ($(PLATFORM),ti814x-evm)
LSPDIR        := $(TI_SW_ROOT)/linux_lsp/TI81XX-LINUX-PSP-04.04.00.01/src
KERNELDIR     := $(LSPDIR)/kernel/linux-04.04.00.01
UBOOTDIR      := $(LSPDIR)/u-boot/u-boot-04.04.00.01
endif

ifeq ($(PLATFORM),ti810x-evm)
LSPDIR        := $(TI_SW_ROOT)/linux_lsp/TI81XX-LINUX-PSP-04.04.00.01/src
KERNELDIR     := $(LSPDIR)/kernel/linux-04.04.00.01
UBOOTDIR      := $(LSPDIR)/u-boot/u-boot-04.04.00.01
endif

# Default klockwork build flag
ifeq ($(DISABLE_AUDIO), )
  DISABLE_AUDIO := no
endif

TREAT_WARNINGS_AS_ERROR=yes


DVR_RDK_ISS_LIB_PATH=$(dvr_rdk_BASE)/dvr_rdk/mcfw/src_bios6/alg/simcop/lib
DVR_RDK_ISS_INC_PATH=$(dvr_rdk_BASE)/dvr_rdk/mcfw/src_bios6/alg/simcop/inc

endif

RPE_BUILD_VARS = ipc_PATH="${ipc_PATH}" \
	bios_PATH="${bios_PATH}" \
	xdc_PATH="${xdc_PATH}" \
	xdais_PATH="${xdais_PATH}" \
	syslink_PATH="${syslink_PATH}" \
	kernel_PATH="${KERNELDIR}" \
	CODESOURCERY_PATH="${CODEGEN_PATH_A8}" \
	CGT_ARM_PREFIX="${CSTOOL_PREFIX}" \
	CODEGEN_PATH_DSP="${CODEGEN_PATH_DSP}" \
	CODEGEN_PATH_DSPELF="${CODEGEN_PATH_DSP}" \
	ROOTDIR="${rpe_PATH}" \
	aaclcdec_PATH="${aaclcdec_PATH}" \
	aaclcenc_PATH="${aaclcenc_PATH}"

-include $(ROOTDIR)/makerules/build_config.mk
-include $(ROOTDIR)/makerules/env.mk
-include $(ROOTDIR)/makerules/platform.mk
-include $(dvr_rdk_PATH)/component.mk

export OS
export PLATFORM
export CORE
export PROFILE_m3vpss
export PROFILE_m3video
export PROFILE_c6xdsp
export CODEGEN_PATH_M3
export CODEGEN_PREFIX
export CODEGEN_PATH_A8
export CODEGEN_PATH_DSP
export bios_PATH
export xdc_PATH
export hdvpss_PATH
export dvr_rdk_PATH
export ipc_PATH
export fc_PATH
export xdais_PATH
export h264dec_PATH
export h264enc_PATH
export jpegdec_PATH
export mpeg4dec_PATH
export jpegenc_PATH
export hdvicplib_PATH
export linuxdevkit_PATH
export edma3lld_PATH
export ROOTDIR
export XDCPATH
export KW_BUILD
export syslink_PATH
export KERNELDIR
export TARGET_FS_DIR
export UBOOTDIR
export DVR_RDK_BOARD_TYPE
export DVR_RDK_BOARD
export USE_SYSLINK_NOTIFY
export DEST_ROOT
export dvr_rdk_BASE
export TFTP_HOME
export LINUX_MEM
export DDR_MEM
export DISABLE_AUDIO
export dvrapp_PATH
export live555_PATH
export qt_PATH
export TREAT_WARNINGS_AS_ERROR
export VS_CARD
export SC_SCRIPTS_BASE_DIR
export iss_PATH
export SYSTEM_SIMCOP_ENABLE
export SYSTEM_SIMCOP_VIDEOM3
export DVR_RDK_ISS_LIB_PATH
export DVR_RDK_ISS_INC_PATH
export DEMOTYPE
export rpe_PATH
export RPE_BUILD_VARS
export aaclcdec_PATH
export aaclcenc_PATH
export mtdutils_PATH

 Here is my bootargs in Uboot.

bootargs=mem=256M console=ttyO2,115200n8 root=/dev/nfs rw rootfstype=jffs2 nfsroot=10.2.50.113:/home/john/arec/DVRRDK/DVRRDK/DM8168_DVRRDK_V03.00.00.00/target/rfs_816x ip=10.2.50.115:10.2.50.113:10.2.50.254:255.255.255.0::eth0:off vram=20M notifyk.vpssm3_sva=0xBEE00000

Here I post the logs from boot -> run.sh -> load.sh for your reference.

UBOOT # boot

NAND read: device 0 offset 0x280000, size 0x300000
 3145728 bytes read: OK
VPDMA Firmware Version = 0x4d0001b2
Connect speed 100M Full
Using DaVinci EMAC device
TFTP from server 10.2.50.113; our IP address is 10.2.50.115
Filename 'uImage_ud816x_dvr'.
Load address: 0x81000000
Loading: #################################################################
         #################################################################
         #################################################################
         #####################################################T ############
         #################################################################
         #################################################################
         #################################################################
         ##############################################
done
Bytes transferred = 2563260 (0x271cbc)
## Booting kernel from Legacy Image at 81000000 ...
   Image Name:   Linux-2.6.37
   Created:      2012-08-21   3:13:02 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2563196 Bytes = 2.4 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

Linux version 2.6.37 (hwjun@localhost.localdomain) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) ) #1 Tue Aug 21 12:12:53 KST 2012
CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: ti8168_dvr
vram size = 20971520 at 0x0
reserved size = 20971520 at 0x0
FB: Reserving 20971520 bytes SDRAM for VRAM
Memory policy: ECC disabled, Data cache writeback
OMAP chip is TI8168 2.0
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 59904
Kernel command line: mem=256M console=ttyO2,115200n8 root=/dev/nfs rw rootfstype=jffs2 nfsroot=10.2.50.113:/home/john/arec/DVRRDK/DVRRDK/DM8168_DVRRDK_V03.00.00.00/target/rfs_816x ip=10.2.50.115:10.2.50.113:10.2.50.254:255.255.255.0::eth0:off vram=20M notifyk.vpssm3_sva=0xBEE00000
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 236MB = 236MB total
Memory: 233884k/233884k available, 28260k reserved, 0K highmem
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0x90800000 - 0xf8000000   (1656 MB)
    lowmem  : 0x80000000 - 0x90000000   ( 256 MB)
    pkmap   : 0x7fe00000 - 0x80000000   (   2 MB)
    modules : 0x7f000000 - 0x7fe00000   (  14 MB)
      .init : 0x80008000 - 0x8003b000   ( 204 kB)
      .text : 0x8003b000 - 0x804d9000   (4728 kB)
      .data : 0x804da000 - 0x80522e40   ( 292 kB)
SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:407
IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
Total of 128 interrupts on 1 active controller
GPMC revision 6.0
Trying to install interrupt handler for IRQ400
Trying to install interrupt handler for IRQ401
Trying to install interrupt handler for IRQ402
Trying to install interrupt handler for IRQ403
Trying to install interrupt handler for IRQ404
Trying to install interrupt handler for IRQ405
Trying to install interrupt handler for IRQ406
Trying to install type control for IRQ407
Trying to set irq flags for IRQ407
OMAP clockevent source: GPTIMER1 at 27000000 Hz
Console: colour dummy device 80x30
Calibrating delay loop... 999.42 BogoMIPS (lpj=4997120)
pid_max: default: 32768 minimum: 301
Security Framework initialized
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
devtmpfs: initialized
omap_voltage_early_init: voltage driver support not added
regulator: core version 0.5
regulator: dummy:
NET: Registered protocol family 16
omap_voltage_domain_lookup: Voltage driver init not yet happened.Faulting!
omap_voltage_add_dev: VDD specified does not exist!
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1
omap_mux_init: Add partition: #1: core, flags: 0
3-wired eeprom init done. (H/W ver:60)
_omap_mux_get_by_name: Could not find signal i2c2_scl.i2c2_scl
_omap_mux_get_by_name: Could not find signal i2c2_sda.i2c2_sda
registered ti816x_sr device
pm_dbg_init: only OMAP3 supported
registered ti81xx_vpss device
registered ti81xx_vidout device
registered ti81xx on-chip HDMI device
registered ti81xx_fb device
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
USBSS revision 4ea20809
registerd cppi-dma Intr @ IRQ 17
Cppi41 Init Done
omap_i2c omap_i2c.1: bus 1 rev4.0 at 400 kHz
regulator: pmbus_vr: 800 <--> 1050 mV at 992 mV
regulator: tps40400 probe done.
omap_i2c omap_i2c.2: bus 2 rev4.0 at 400 kHz
Advanced Linux Sound Architecture Driver Version 1.0.23.
Switching to clocksource gp timer
musb-hdrc: version 6.0, host, debug=0
musb-hdrc musb-hdrc.0: dma type: dma-cppi41
MUSB controller-0 revision 4ea20800
musb-hdrc musb-hdrc.0: MUSB HDRC host driver
musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 1
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: MUSB HDRC host driver
usb usb1: Manufacturer: Linux 2.6.37 musb-hcd
usb usb1: SerialNumber: musb-hdrc.0
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
musb-hdrc musb-hdrc.0: USB Host mode controller at 9081e000 using DMA, IRQ 18
musb-hdrc musb-hdrc.1: dma type: dma-cppi41
MUSB controller-1 revision 4ea20800
musb-hdrc musb-hdrc.1: MUSB HDRC host driver
musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 2
usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: MUSB HDRC host driver
usb usb2: Manufacturer: Linux 2.6.37 musb-hcd
usb usb2: SerialNumber: musb-hdrc.1
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
musb-hdrc musb-hdrc.1: USB Host mode controller at 90828800 using DMA, IRQ 19
NET: Registered protocol family 2
IP route cache hash table entries: 2048 (order: 1, 8192 bytes)
TCP established hash table entries: 8192 (order: 4, 65536 bytes)
TCP bind hash table entries: 8192 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
NetWinder Floating Point Emulator V0.97 (double precision)
PMU: registered new PMU device of type 0
omap-iommu omap-iommu.0: ducati registered
omap-iommu omap-iommu.1: sys registered
JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
msgmni has been set to 456
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
omap_uart.0: ttyO0 at MMIO 0x48020000 (irq = 72) is a OMAP UART0
omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1
omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2
console [ttyO2] enabled
brd: module loaded
loop: module loaded
ahci ahci.0: forcing PORTS_IMPL to 0x3
ahci ahci.0: AHCI 0001.0100 32 slots 2 ports 3 Gbps 0x3 impl platform mode
ahci ahci.0: flags: ncq sntf pm led clo only pmp pio slum part ccc
scsi0 : ahci_platform
scsi1 : ahci_platform
ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a150fff] port 0x100 irq 16
ata2: SATA max UDMA/133 irq_stat 0x00400040, connection status changed irq 16
omap2-nand driver initializing
NAND device: Maf ID: 0xec, Chip ID: 0xda (Samsung, )
 erasesize: 0x20000, writesize: 2048, oobsize: 64
Creating 6 MTD partitions on "omap2-nand.0":
0x000000000000-0x000000240000 : "U-Boot"
0x000000240000-0x000000280000 : "U-Boot Env"
0x000000280000-0x000000580000 : "U-Boot Logo"
0x000000580000-0x0000009c0000 : "Kernel"
0x0000009c0000-0x00000d1e0000 : "File System"
0x00000d1e0000-0x000010000000 : "Reserved"
davinci_mdio davinci_mdio.0: davinci mdio revision 1.6
davinci_mdio davinci_mdio.0: detected phy mask fffffff8
davinci_mdio.0: probed
davinci_mdio davinci_mdio.0: phy[0]: device 0:00, driver unknown
davinci_mdio davinci_mdio.0: phy[1]: device 0:01, driver unknown
davinci_mdio davinci_mdio.0: phy[2]: device 0:02, driver unknown
usbcore: registered new interface driver cdc_ether
usbcore: registered new interface driver dm9601
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
mice: PS/2 mouse device common for all mice
usb 2-1: new high speed USB device using musb-hdrc and address 2
rtc-ds1307 1-0068: rtc core: registered ds1337 as rtc0
omap_rtc omap_rtc: rtc core: registered omap_rtc as rtc1
i2c /dev entries driver
Linux video capture interface: v2.00
usbcore: registered new interface driver uvcvideo
USB Video Class driver (v1.0.0)
OMAP Watchdog Timer Rev 0x00: initial timeout 60 sec
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
notify_init : notify drivercreated  for  remote proc id 2 at physical Address 0xbee00000
usbcore: registered new interface driver snd-usb-audio
Registered tvp5158 audio codec
asoc: tvp5158-hifi <-> davinci-mcasp.0 mapping ok
asoc: tlv320aic3x-hifi <-> davinci-mcasp.2 mapping ok
asoc: HDMI-DAI-CODEC <-> hdmi-dai mapping ok
ALSA device list:
  #0: TI81XX SOUND0
  #1: TI81XX SOUND1
TCP cubic registered
NET: Registered protocol family 17
VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
omap_voltage_late_init: Voltage driver support not added
Power Management for TI81XX.
smartreflex-ti816x: ti816x_sr_probe done!
rtc-ds1307 1-0068: setting system clock to 2012-11-21 20:06:01 UTC (1353528361)
usb 2-1: New USB device found, idVendor=17ef, idProduct=383c
usb 2-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 2-1: Product: USB Flash Drive
usb 2-1: Manufacturer: Lenovo
usb 2-1: SerialNumber: BNJ85U5V
scsi2 : usb-storage 2-1:1.0
davinci_mdio davinci_mdio.0: resetting idled controller
net eth0: attached PHY driver [Generic PHY] (mii_bus:phy_addr=0:01, id=1cc914)
scsi 2:0:0:0: Direct-Access     Lenovo   USB Flash Drive  8.01 PQ: 0 ANSI: 2
sd 2:0:0:0: Attached scsi generic sg0 type 0
sd 2:0:0:0: [sda] 3983358 512-byte logical blocks: (2.03 GB/1.89 GiB)
sd 2:0:0:0: [sda] Write Protect is off
sd 2:0:0:0: [sda] Assuming drive cache: write through
sd 2:0:0:0: [sda] Assuming drive cache: write through
IP-Config: Complete:
     device=eth0, addr=10.2.50.115, mask=255.255.255.0, gw=10.2.50.254,
     host=10.2.50.115, domain=, nis-domain=(none),
     bootserver=10.2.50.113, rootserver=10.2.50.113, rootpath=
 sda: sda1
sd 2:0:0:0: [sda] Assuming drive cache: write through
sd 2:0:0:0: [sda] Attached SCSI removable disk
PHY: 0:01 - Link is Up - 100/Full
ata1: SATA link down (SStatus 0 SControl 300)
ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata2.15: Port Multiplier 1.2, 0x197b:0x3215 r0, 5 ports, feat 0x5/0xf
ata2.00: hard resetting link
ata2.00: SATA link down (SStatus 0 SControl 320)
ata2.01: hard resetting link
ata2.01: SATA link down (SStatus 0 SControl 320)
ata2.02: hard resetting link
ata2.02: SATA link down (SStatus 0 SControl 320)
ata2.03: hard resetting link
ata2.03: SATA link down (SStatus 0 SControl 320)
ata2.04: hard resetting link
ata2.04: SATA link down (SStatus 0 SControl 320)
ata2: EH complete
VFS: Mounted root (nfs filesystem) on device 0:15.
devtmpfs: mounted
Freeing init memory: 204K
INIT: version 2.86 booting
Error opening /dev/fb0: No such file or directory
Please wait: booting...
Starting udev
udevd (85): /proc/85/oom_adj is deprecated, please use /proc/85/oom_score_adj instead.
udev: starting version 141
Root filesystem already rw, not remounting
Caching udev devnodes
Populating dev cache
FAT: invalid media value (0x00)
VFS: Can't find a valid FAT filesystem on dev sda.
EXT3-fs (sda): error: can't find ext3 filesystem on dev sda.
EXT2-fs (sda): error: can't find an ext2 filesystem on dev sda.
FAT: invalid media value (0x00)
VFS: Can't find a valid FAT filesystem on dev sda.
ISOFS: Unable to identify CD-ROM format.
ALSA: Restoring mixer settings...
EXT3-fs: barriers not enabled
kjournald starting.  Commit interval 5 seconds
EXT3-fs (sda1): warning: maximal mount count reached, running e2fsck is recommended
EXT3-fs (sda1): using internal journal
EXT3-fs (sda1): mounted filesystem with writeback data mode
NOT configuring network interfaces: / is an NFS mount
INIT: Entering runlevel: 5
Starting system message bus: dbus.
Starting telnet daemon.
Starting syslogd/klogd: done
Starting thttpd.

 _   _ ___  _   _         _
| | | |    | ||| |___ ___| | _ ___
| |_| | |) |  ~  | . |  _| |/_|  -|
|_____|___ /____/ ___|_| |_| _|-__|

DVR_DM816x Board (2012.08)

dvr login: root
 _   _ ___  _   _         _
| | | |    | ||| |___ ___| | _ ___
| |_| | |) |  ~  | . |  _| |/_|  -|
|_____|___ /____/ ___|_| |_| _|-__|

DVR_DM816x Board (2012.08)

root@dvr:~#
root@dvr:~# cd dvr_rdk/ti816x_john/
root@dvr:~/dvr_rdk/ti816x_john#
root@dvr:~/dvr_rdk/ti816x_john# ./init.sh
*** Bootargs Validated for mem param ***
*** Bootargs Validated for notifyk.vpssm3 params ***
Kernel bootargs validated
numid=101,iface=MIXER,name='Left DAC Mux'
  ; type=ENUMERATED,access=rw------,values=1,items=3
  ; Item #0 'DAC_L1'
  ; Item #1 'DAC_L3'
  ; Item #2 'DAC_L2'
  : values=2
numid=99,iface=MIXER,name='Right DAC Mux'
  ; type=ENUMERATED,access=rw------,values=1,items=3
  ; Item #0 'DAC_R1'
  ; Item #1 'DAC_R3'
  ; Item #2 'DAC_R2'
  : values=2
 [c6xdsp ] Remote Debug Shared Memory @ 0xbf000000
 [m3video] Remote Debug Shared Memory @ 0xbf005020
 [m3vpss ] Remote Debug Shared Memory @ 0xbf00a040
SysLink version : 2.10.02.17
SysLink module created on Date:Oct 31 2012 Time:18:22:41
Trace enabled
Trace SetFailureReason enabled
 Setting DMM priority for [DUCATI  ] to [0] ( 0x4e000624 = 0x08000000 )
 Setting DMM priority for [HDVICP0 ] to [2] ( 0x4e000634 = 0x0000000a )
 Setting DMM priority for [HDVICP1 ] to [2] ( 0x4e000634 = 0x000a0000 )
 Setting DMM priority for [HDVICP2 ] to [2] ( 0x4e000634 = 0x00a00000 )
 
 *** TVP5158 probe : START ***
 
 TI VS EVM : TVP5158 device address : 0x58, 0x5a, 0x5c, 0x5e
 TI DVR    : TVP5158 device address : 0x5c, 0x5d, 0x5e, 0x5f
 
 Device found     : I2C (0xXX): 0x08 = 0x51
                    I2C (0xXX): 0x09 = 0x58
 
 Device NOT found : I2C (0xXX): Read ERROR !!! (reg[0x08], count = 2)
 
 I2C (0x58): Read ERROR !!! (reg[0x08], count = 2)
 I2C (0x5a): Read ERROR !!! (reg[0x08], count = 2)
 I2C (0x5c): 0x08 = 0x51
 I2C (0x5c): 0x09 = 0x58
 I2C (0x5d): 0x08 = 0x51
 I2C (0x5d): 0x09 = 0x58
 I2C (0x5e): 0x08 = 0x51
 I2C (0x5e): 0x09 = 0x58
 I2C (0x5f): 0x08 = 0x51
 I2C (0x5f): 0x09 = 0x58
 
 *** TVP5158 probe : END ***
 
/home/root/dvr_rdk/ti816x_john
root@dvr:~/dvr_rdk/ti816x_john#
root@dvr:~/dvr_rdk/ti816x_john#
root@dvr:~/dvr_rdk/ti816x_john#
root@dvr:~/dvr_rdk/ti816x_john# ./load.sh
Attached to slave procId 2.
Loaded file ../firmware/dvr_rdk_BUG: Your driver calls ioremap() on system memory.  This leads
to architecturally unpredictable behaviour on ARMv6+, and ioremap()
will fail in the next kernel release.  Please fix your driver.
fw_m3vpss.xem3 o------------[ cut here ]------------
n slave procId 2WARNING: at arch/arm/mm/ioremap.c:211 __arm_ioremap_pfn_caller+0x58/0x190()
.
Started slaveModules linked in: procId 2.
 syslink
Backtrace:
[<80049b7c>] (dump_backtrace+0x0/0x10c) from [<8039c118>] (dump_stack+0x18/0x1c)
 r7:00000000 r6:8004d60c r5:8045c7dc r4:000000d3
[<8039c100>] (dump_stack+0x0/0x1c) from [<8006d3bc>] (warn_slowpath_common+0x54/0x6c)
[<8006d368>] (warn_slowpath_common+0x0/0x6c) from [<8006d3f8>] (warn_slowpath_null+0x24/0x2c)
 r9:00000002 r8:00000000 r7:7f03608c r6:00088000 r5:15000000
r4:00000002
[<8006d3d4>] (warn_slowpath_null+0x0/0x2c) from [<8004d60c>] (__arm_ioremap_pfn_caller+0x58/0x190)
[<8004d5b4>] (__arm_ioremap_pfn_caller+0x0/0x190) from [<8004d7c8>] (__arm_ioremap_caller+0x64/0x6c)
[<8004d764>] (__arm_ioremap_caller+0x0/0x6c) from [<8006000c>] (omap_ioremap+0x60/0x64)
 r6:00000002 r5:15000000 r4:88000000
[<8005ffac>] (omap_ioremap+0x0/0x64) from [<7f03608c>] (MemoryOS_map+0x1f0/0x3a8 [syslink])
 r7:8deafe28 r6:00000001 r5:8deafd48 r4:908fe000
[<7f035e9c>] (MemoryOS_map+0x0/0x3a8 [syslink]) from [<7f004594>] (_ProcMgr_map+0x1cc/0x4ac [syslink])
 r8:8deafe28 r7:8deafe28 r6:00000001 r5:9302e000 r4:90abd000
[<7f0043c8>] (_ProcMgr_map+0x0/0x4ac [syslink]) from [<7f004990>] (ProcMgr_map+0x11c/0x1b4 [syslink])
[<7f004874>] (ProcMgr_map+0x0/0x1b4 [syslink]) from [<7f019954>] (Platform_loadCallback+0x4a0/0x7a0 [syslink])
[<7f0194b4>] (Platform_loadCallback+0x0/0x7a0 [syslink]) from [<7f04d418>] (Ipc_control+0x68/0x14c [syslink])
[<7f04d3b0>] (Ipc_control+0x0/0x14c [syslink]) from [<7f0868f0>] (IpcDrv_drvioctl+0x68/0x298 [syslink])
 r7:00000004 r6:7f0fb920 r5:c014f497 r4:7ebebafc
[<7f086888>] (IpcDrv_drvioctl+0x0/0x298 [syslink]) from [<800d26a4>] (vfs_ioctl+0x28/0x44)
 r6:00000004 r5:8dcfc480 r4:00000000
[<800d267c>] (vfs_ioctl+0x0/0x44) from [<800d2db4>] (do_vfs_ioctl+0x500/0x540)
[<800d28b4>] (do_vfs_ioctl+0x0/0x540) from [<800d2e4c>] (sys_ioctl+0x58/0x7c)
[<800d2df4>] (sys_ioctl+0x0/0x7c) from [<80045da0>] (ret_fast_syscall+0x0/0x30)
 r8:80045f48 r7:00000036 r6:0007e478 r5:c014f497 r4:7ebebafc
---[ end trace 869b7a02edb84d01 ]---
 [m3vpss ] ***** SYSTEM  : Frequency <ORG> - 250000000, <NEW> - 280000000
 [m3vpss ] notify_attach  rtnVal  0
 [m3vpss ] initProxyServer  rtnVal  0
 [m3vpss ]  
 [m3vpss ]  *** UTILS: CPU KHz = 560000 Khz ***
 [m3vpss ]  
 [m3vpss ]  210: SYSTEM  : System Common Init in progress !!!
After Ipc_loadcallback status [0x00000000]
 [m3vpss ]  210: SYSTEM: IPC init in progress !!!
 [m3vpss ]  210: SYSTEM: Attaching to [HOST] ...
 [m3vpss ]  1209: SYSTEM: Attaching to [HOST] ...
 [m3vpss ]  1212: SYSTEM: Attaching to [HOST] ... SUCCESS !!!
 [m3vpss ]  1212: SYSTEM: Attaching to [DSP] ...
After Ipc_startcallback status [0x097d2000]
 [m3vpss ]  2211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  3211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  4211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  5211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  6211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  7211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  8211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  9211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  10211: SYSTEM: Attaching to [DSP] ...
Attached to slave procId 1.
 [m3vpss ]  11211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  12211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  13211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  14211: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  15211: SYSTEM: Attaching to [DSP] ...
Loaded file ../firmware/dvr_rdk_fw_m3video.xem3 on slave procId 1.
Started slave procId 1.
After Ipc_loadcallback status [0x00000000]
After Ipc_startcallback status [0x00000000]
 [m3video] ***** SYSTEM  : Frequency <ORG> - 250000000, <NEW> - 280000000
 [m3vpss ]  16212: SYSTEM: Attaching to [DSP] ...
 [m3video]  
 [m3video]  *** UTILS: CPU KHz = 560000 Khz ***
 [m3video]  
 [m3video]  15471: SYSTEM  : System Common Init in progress !!!
 [m3video]  15471: SYSTEM: IPC init in progress !!!
 [m3video]  15471: SYSTEM: Attaching to [HOST] ...
 [m3video]  16471: SYSTEM: Attaching to [HOST] ...
 [m3video]  16473: SYSTEM: Attaching to [HOST] ... SUCCESS !!!
 [m3video]  16473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  17212: SYSTEM: Attaching to [DSP] ...
 [m3video]  17473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  18212: SYSTEM: Attaching to [DSP] ...
 [m3video]  18473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  19212: SYSTEM: Attaching to [DSP] ...
 [m3video]  19473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  20212: SYSTEM: Attaching to [DSP] ...
 [m3video]  20473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  21212: SYSTEM: Attaching to [DSP] ...
 [m3video]  21473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  22212: SYSTEM: Attaching to [DSP] ...
 [m3video]  22473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  23212: SYSTEM: Attaching to [DSP] ...
 [m3video]  23473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  24212: SYSTEM: Attaching to [DSP] ...
 [m3video]  24473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  25212: SYSTEM: Attaching to [DSP] ...
 [m3video]  25473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  26212: SYSTEM: Attaching to [DSP] ...
 [m3video]  26473: SYSTEM: Attaching to [DSP] ...
Attached to slave procId 0.
 [m3vpss ]  27212: SYSTEM: Attaching to [DSP] ...
 [m3video]  27473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  28212: SYSTEM: Attaching to [DSP] ...
 [m3video]  28473: SYSTEM: Attaching to [DSP] ...
Loaded file ../firmware/dvr_rdk_fw_c6xdsp.xe674 on slave procId 0.
Started slave procId 0.
After Ipc_loadcallback status [0x00000000]
 [c6xdsp ] ***** SYSTEM  : Frequency <ORG> - 800000000, <NEW> - 800000000
 [m3video]  29473: SYSTEM: Attaching to [DSP] ...
 [m3vpss ]  29212: SYSTEM: Attaching to [DSP] ...
 [c6xdsp ]  
 [c6xdsp ]  *** UTILS: CPU KHz = 800000 Khz ***
 [c6xdsp ]  
 [c6xdsp ]  5: SYSTEM  : System Common Init in progress !!!
 [c6xdsp ]  5: SYSTEM: IPC init in progress !!!
 [c6xdsp ]  5: SYSTEM: Attaching to [HOST] ...
 [c6xdsp ]  1012: SYSTEM: Attaching to [HOST] ...
 [c6xdsp ]  1015: SYSTEM: Attaching to [HOST] ... SUCCESS !!!
 [c6xdsp ]  1015: SYSTEM: Attaching to [VIDEO-M3] ...
After Ipc_startcallback status [0x00000000]
 [m3vpss ]  30212: SYSTEM: Attaching to [DSP] ...
 [m3video]  30473: SYSTEM: Attaching to [DSP] ...
 [c6xdsp ]  2021: SYSTEM: Attaching to [VIDEO-M3] ...
 [m3vpss ]  31212: SYSTEM: Attaching to [DSP] ...
 [c6xdsp ]  2513: SYSTEM: Attaching to [VIDEO-M3] ... SUCCESS !!!
 [m3video]  31473: SYSTEM: Attaching to [DSP] ...
 [c6xdsp ]  2513: SYSTEM: Attaching to [VPSS-M3] ...
 [m3video]  31473: SYSTEM: Attaching to [DSP] ... SUCCESS !!!
 [m3video]  31473: SYSTEM: Attaching to [VPSS-M3] ...
 [m3vpss ]  32212: SYSTEM: Attaching to [DSP] ...
DMA: Module install successful, device major num = 251
DRV: Module install successful
DRV: Module built on Nov 12 2012 09:38:53
 [c6xdsp ] Remote Debug Shared Memory @ 0xbf000000
 [m3video] Remote Debug Shared Memory @ 0xbf005020
 [m3vpss ] Remote Debug Shared Memory @ 0xbf00a040
 [m3video]  32473: SYSTEM: Attaching to [VPSS-M3] ...
 [c6xdsp ]  3520: SYSTEM: Attaching to [VPSS-M3] ...
 [c6xdsp ]  4252: SYSTEM: Attaching to [VPSS-M3] ... SUCCESS !!!
 [m3vpss ]  33212: SYSTEM: Attaching to [DSP] ...
 [c6xdsp ]  4252: SYSTEM: Opening MsgQ Heap [IPC_MSGQ_MSG_HEAP] ...
 [m3vpss ]  33212: SYSTEM: Attaching to [DSP] ... SUCCESS !!!
 [m3vpss ]  33212: SYSTEM: Attaching to [VIDEO-M3] ...
 [m3video]  33473: SYSTEM: Attaching to [VPSS-M3] ...
 [c6xdsp ]  5259: SYSTEM: Opening MsgQ Heap [IPC_MSGQ_MSG_HEAP] ...
 [m3video]  34212: SYSTEM: Attaching to [VPSS-M3] ... SUCCESS !!!
 [m3vpss ]  34212: SYSTEM: Attaching to [VIDEO-M3] ...
 [c6xdsp ]  5259: SYSTEM: Creating MsgQ [DSP_MSGQ] ...
 [m3video]  34212: SYSTEM: Opening MsgQ Heap [IPC_MSGQ_MSG_HEAP] ...
 [m3vpss ]  34212: SYSTEM: Attaching to [VIDEO-M3] ... SUCCESS !!!
 [c6xdsp ]  5259: SYSTEM: Creating MsgQ [DSP_ACK_MSGQ] ...
 [m3video]  34212: SYSTEM: Creating MsgQ [VIDEO-M3_MSGQ] ...
 [m3vpss ]  34212: SYSTEM: Creating MsgQ Heap [IPC_MSGQ_MSG_HEAP] ...
 [c6xdsp ]  5260: SYSTEM: Notify register to [HOST] line 0, event 15 ...
 [m3video]  34213: SYSTEM: Creating MsgQ [VIDEO-M3_ACK_MSGQ] ...
 [m3vpss ]  34212: SYSTEM: Creating MsgQ [VPSS-M3_MSGQ] ...
 [c6xdsp ]  5260: SYSTEM: Notify register to [VIDEO-M3] line 0, event 15 ...
 [m3video]  34214: SYSTEM: Notify register to [HOST] line 0, event 15 ...
 [m3vpss ]  34212: SYSTEM: Creating MsgQ [VPSS-M3_ACK_MSGQ] ...
 [c6xdsp ]  5260: SYSTEM: Notify register to [VPSS-M3] line 0, event 15 ...
 [m3video]  34214: SYSTEM: Notify register to [DSP] line 0, event 15 ...
 [m3vpss ]  34214: SYSTEM: Notify register to [HOST] line 0, event 15 ...
 [c6xdsp ]  5260: SYSTEM: IPC init DONE !!!
 [m3video]  34214: SYSTEM: Notify register to [VPSS-M3] line 0, event 15 ...
 [m3vpss ]  34214: SYSTEM: Notify register to [DSP] line 0, event 15 ...
 [m3video]  34215: SYSTEM: IPC init DONE !!!
 [m3vpss ]  34214: SYSTEM: Notify register to [VIDEO-M3] line 0, event 15 ...
 [m3video]  34220: MEM: Shared Region 2: Base = 0xb0000000, Length = 0x0e9c0000 (233 MB)
 [m3vpss ]  34214: SYSTEM: IPC init DONE !!!
 [m3video]  34220: MEM: Shared Region 1: Base = 0x88000000, Length = 0x15000000 (336 MB)
 [m3vpss ]  34220: MEM: Shared Region 2: Base = 0xb0000000, Length = 0x0e9c0000 (233 MB)
 [m3vpss ]  34220: MEM: Shared Region 1: Base = 0x88000000, Length = 0x15000000 (336 MB)
 [c6xdsp ]  5262: MEM: Shared Region 2: Base = 0xb0000000, Length = 0x0e9c0000 (233 MB)
 [m3video]  34222: SYSTEM  : System Common Init Done !!!
 [m3vpss ]  34222: SYSTEM  : System Common Init Done !!!
 [c6xdsp ]  5262: MEM: Shared Region 1: Base = 0x88000000, Length = 0x15000000 (336 MB)
 [m3video]  34222: SYSTEM  : System Video Init in progress !!!
 [m3vpss ]  34222: SYSTEM  : System VPSS Init in progress !!!
 [c6xdsp ]  5262: SYSTEM  : System Common Init Done !!!
 [m3video]  34222: SYSTEM  : System Video Init Done !!!
 [m3vpss ]  34222: SYSTEM: All VPDMA Free !!!
 [c6xdsp ]  5220: SYSTEM  : System DSP Init in progress !!!
 [m3video]  34223: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_0] in region 0 ...
 [m3vpss ] === HDVPSS Clocks are enabled ===
 [c6xdsp ]  5220: SYSTEM  : RpeServer_init() done... Ret Val 0!!!
 [m3video]  34223: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_0] in region 0 ...
 [m3vpss ] === HDVPSS is fully functional ===
 [c6xdsp ]  5265: SYSTEM: Creating ListMP [DSP_IPC_OUT_19] in region 0 ...
 [m3video]  34223: SYSTEM: ListElem Shared Addr = 0xbf18b680
 [m3vpss ] === HDVPSS module is not in standby ===
 [c6xdsp ]  5265: SYSTEM: Creating ListMP [DSP_IPC_IN_19] in region 0 ...
 [m3video]  34225: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_1] in region 0 ...
 [m3vpss ] === I2C1 Clk is active ===
 [c6xdsp ]  5265: SYSTEM: ListElem Shared Addr = 0xbf18ee80
 [m3video]  34225: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_1] in region 0 ...
 [m3vpss ]  34227: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_0] in region 0 ...
 [c6xdsp ]  5266: SYSTEM: Creating ListMP [DSP_IPC_OUT_20] in region 0 ...
 [m3video]  34225: SYSTEM: ListElem Shared Addr = 0xbf1ae580
 [m3vpss ]  34227: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_0] in region 0 ...
 [c6xdsp ]  5266: SYSTEM: Creating ListMP [DSP_IPC_IN_20] in region 0 ...
 [m3video]  34230: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_19] in region 0 ...
 [m3vpss ]  34227: SYSTEM: ListElem Shared Addr = 0xbf1f1100
 [c6xdsp ]  5266: SYSTEM: ListElem Shared Addr = 0xbf1b1a80
 [m3video]  34231: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_19] in region 0 ...
 [m3vpss ]  34229: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_1] in region 0 ...
 [c6xdsp ]  5267: SYSTEM: Creating ListMP [DSP_IPC_OUT_21] in region 0 ...
 [m3video]  34231: SYSTEM: ListElem Shared Addr = 0xbf232e80
 [m3vpss ]  34229: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_1] in region 0 ...
 [c6xdsp ]  5267: SYSTEM: Creating ListMP [DSP_IPC_IN_21] in region 0 ...
 [m3video]  34233: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_20] in region 0 ...
 [m3vpss ]  34230: SYSTEM: ListElem Shared Addr = 0xbf22f980
 [c6xdsp ]  5267: SYSTEM: ListElem Shared Addr = 0xbf1d1480
 [m3video]  34233: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_20] in region 0 ...
 [m3vpss ]  34241: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_19] in region 0 ...
 [c6xdsp ]  5268: SYSTEM: Creating ListMP [DSP_IPC_OUT_24] in region 0 ...
 [m3video]  34233: SYSTEM: ListElem Shared Addr = 0xbf252880
 [m3vpss ]  34241: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_19] in region 0 ...
 [c6xdsp ]  5268: SYSTEM: Creating ListMP [DSP_IPC_IN_24] in region 0 ...
 [m3video]  34236: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_21] in region 0 ...
 [m3vpss ]  34241: SYSTEM: ListElem Shared Addr = 0xbf291c80
 [c6xdsp ]  5268: SYSTEM: ListElem Shared Addr = 0xbf1f4380
 [m3video]  34236: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_21] in region 0 ...
 [m3vpss ]  34243: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_20] in region 0 ...
 [c6xdsp ]  5268: SYSTEM: Creating ListMP [DSP_IPC_OUT_25] in region 0 ...
 [m3video]  34236: SYSTEM: ListElem Shared Addr = 0xbf272280
 [m3vpss ]  34243: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_20] in region 0 ...
 [c6xdsp ]  5268: SYSTEM: Creating ListMP [DSP_IPC_IN_25] in region 0 ...
 [m3video]  34246: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_24] in region 0 ...
 [m3vpss ]  34243: SYSTEM: ListElem Shared Addr = 0xbf2b1680
 [c6xdsp ]  5268: SYSTEM: ListElem Shared Addr = 0xbf211e80
 [m3video]  34246: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_24] in region 0 ...
 [m3vpss ]  34245: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_21] in region 0 ...
 [c6xdsp ] !!WARNING.Resource already registered:2
 [c6xdsp ]  5226: SYSTEM  : Initializing Links !!!
 [m3video]  34247: SYSTEM: ListElem Shared Addr = 0xbf2f0a80
 [m3vpss ]  34246: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_21] in region 0 ...
 [m3video]  34248: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_25] in region 0 ...
 [m3vpss ]  34246: SYSTEM: ListElem Shared Addr = 0xbf2d1080
 [c6xdsp ]  5269: SYSTEM  : FREE SPACE : System Heap      = 10268448 B, Mbx = 10240 msgs)
 [m3video]  34249: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_25] in region 0 ...
 [m3vpss ]  34247: SYSTEM : HDVPSS Drivers Version: HDVPSS_01_00_01_37
 [m3video]  34249: SYSTEM: ListElem Shared Addr = 0xbf30e580
 [m3vpss ]  34248: SYSTEM  : FVID2 Init in progress !!!
 [c6xdsp ]  5235: SYSTEM  : Initializing Links ... DONE !!!
 [m3video]  34250: HDVICP: Doing PRCM for IVAHD[0] ...
 [m3vpss ]  34331: SYSTEM  : FVID2 Init in progress DONE !!!
 [m3video]  34251: HDVICP: PRCM for IVAHD[0] ... DONE.
 [m3vpss ]  34331: SYSTEM  : Device Init in progress !!!
 [c6xdsp ]  5236: SYSTEM  : System DSP Init Done !!!
 [m3video]  34251: HDVICP: Doing PRCM for IVAHD[1] ...
 [m3video]  34251: HDVICP: PRCM for IVAHD[1] ... DONE.
 [m3vpss ] initPrms.isI2cInitReq = 0
 [m3video]  34251: HDVICP: Doing PRCM for IVAHD[2] ...
 [m3video]  34251: HDVICP: PRCM for IVAHD[2] ... DONE.
 [m3vpss ] initPrms.isI2cInitReq = 0
 [m3video]  34251: SYSTEM  : Initializing Links !!!
 [m3vpss ]  34334: SYSTEM  : Device Init in progress DONE !!!
 [m3vpss ]  34451: SYSTEM  : System VPSS Init Done !!!
 [m3video]  34251: SYSTEM  : FREE SPACE : System Heap      = 6280232 B, Mbx = 10240 msgs)
 [m3vpss ]  34452: UTILS: DMA: HWI Create for INT63 !!!
 [m3vpss ]  34452: SYSTEM  : Initializing Links !!!
 [m3video]  34252: SYSTEM  : FREE SPACE : SR0 Heap         = 13452672 B (12 MB)
 [m3vpss ]  34452: SYSTEM  : FREE SPACE : System Heap      = 13024 B, Mbx = 10240 msgs)
 [m3video]  34252: SYSTEM  : FREE SPACE : Frame Buffer     = 245104512 B (233 MB)
 [m3vpss ]  34452: SYSTEM  : FREE SPACE : SR0 Heap         = 13452672 B (12 MB)
 [m3video]  34252: SYSTEM  : FREE SPACE : Bitstream Buffer = 352321408 B (335 MB)
 [m3vpss ]  34452: SYSTEM  : FREE SPACE : Frame Buffer     = 240794496 B (229 MB)
 [m3video]  34252: SYSTEM: Opening MsgQ [VPSS-M3_MSGQ] ...
 [m3video]  34253: SYSTEM  : FREE SPACE : Tiler 8-bit      = 134217728 B (128 MB)  - TILER ON
 [m3vpss ]  34452: SYSTEM  : FREE SPACE : Bitstream Buffer = 352321408 B (335 MB)
 [m3vpss ] Received character 's'
 [m3video]  34253: SYSTEM  : FREE SPACE : Tiler 16-bit     = 134217728 B (128 MB)  - TILER ON
 [m3vpss ]  34453: SYSTEM  : FREE SPACE : Tiler 8-bit      = 134217728 B (128 MB)  - TILER ON
 [c6xdsp ] Remote Debug Shared Memory @ 0xbf000000
 [m3video] Remote Debug Shared Memory @ 0xbf005020
 [m3vpss ] Remote Debug Shared Memory @ 0xbf00a040
 [m3video] Received character 's'
 [m3video]  34281: SYSTEM  : Initializing Links ... DONE !!!
 [m3vpss ]  34453: SYSTEM  : FREE SPACE : Tiler 16-bit     = 134217728 B (128 MB)  - TILER ON
 [m3vpss ]  34551: SYSTEM  : Initializing Links ... DONE !!!
 [c6xdsp ] Remote Debug Shared Memory @ 0xbf000000
 [m3video] Remote Debug Shared Memory @ 0xbf005020
 [m3vpss ] Remote Debug Shared Memory @ 0xbf00a040
 [c6xdsp ] Received character 's'
/home/root/dvr_rdk/ti816x_john
 [m3vpss ]  34552: SYSTEM  : Set Static L3 pressure for HDVPSS as High
[module] vpss probe done.
[module] ti81xxfb probe done.
HDMI W1 rev 2.0
[module] ti81xx_hdmi probe done.
 
 ORG 0x46c00524: 0
 NEW 0x46c00524: 2
 
root@dvr:~/dvr_rdk/ti816x_john#
root@dvr:~/dvr_rdk/ti816x_john#
root@dvr:~/dvr_rdk/ti816x_john#

It seems takes long time in the below step when load firmware.

[m3video]  21473: SYSTEM: Attaching to [DSP] ...
[m3vpss ]  22212: SYSTEM: Attaching to [DSP] ...

Hope the informations could help.

If any other information or logs are needed, just let me know.

- JohnWang

Regards.

Looks like you have changed DDR_MEM=.Can you set it back to 1024M and try.Make sure you clean,delete dvr_rdk/build and dvr_rdk/lib folder and re-build and also make sure to delete /target/rfs_816x/opt/dvr_rdk/ti816x folder before trying with new binaries.

OK, I'll try it and report the result ASAP.

Do you mean rebuild all? (I mean @ make -s sys_all )

Or only rebuild firmware is okay?

Rebuild firmware

rm -rf target/rfs_816x/opt/dvr_rdk/ti816x

rm -rf bin/ti816x/firmware

rm -rf bin/ti816x/env*.sh

rm -rfv build

rm -rfv lib

make clean 

Modify Rules.make

make dvr_rdk

Hello, Badri

       The problem is resolved by modifying the DDM_MEM back to 1024M.

       I really appreciate it.

       But, one question comes to my mind.

       I currently have 2G DDR RAM installed physically in my DVRRDM box.

       Why we need to set the DDR_MEM to 1024M in building procedure?

       Sorry I don't have much idea about this, can you explain it in more detailed?

       Will 1G RAM be wasted in 1024M setting?

The 1GB from 0xC000_0000 to 0xFFFF_FFFF is available for linux .You can use it by setting mem=512M@0xC0000000 in your kernel bootargs. For using the 2G for video frame buffers you need to use the 2G build configuration. Can you share the config_2G.bld file in your codebase. I want to check if there is any issue with the memory map.

Hello, Badri

OK, here is the config_2G.bld in my codebase for your reference.

/*
 *  ======== config.bld ========
 *  Build configuration script for HDVPSS drivers
 */

/* load the required modules for the configuration */

var M3 = xdc.useModule('ti.targets.arm.elf.M3');
var C674 = xdc.useModule('ti.targets.elf.C674');

var buildReleaseConfig = true;

/* configure  the options for the M3 targets     */

/* M3 compiler directory path                    */
M3.rootDir = java.lang.System.getenv("CGTOOLS");

/* linker options */

M3.lnkOpts.suffix += " --zero_init=off ";
M3.lnkOpts.suffix += " --dynamic --retain=_Ipc_ResetVector";

/* compiler options                                */
M3.ccOpts.suffix += " --gcc -DTI_816X_BUILD -DPLATFORM_EVM_SI -DSYSLINK_BUILD_RTOS -DUSE_SYSLINK_NOTIFY=0 -DUTILS_ASSERT_ENABLE";

/* set default platform and list of all interested
 * platforms for M3
 */
M3.platforms = [
                        "ti.platforms.evmTI816X:core0",
                        "ti.platforms.evmTI816X:core1",
               ];

/* Select the default platform
 *
 * Making core1 as defualt core configuration to be used
 *  Core 0 ==    Ducati.M3.VIDEO
 *  Core 1 ==    Ducati.M3.VPS
 */
M3.platform = M3.platforms[1];

/* configure  the options for the C674 targets     */

/* C674 compiler directory path                    */
C674.rootDir = java.lang.System.getenv("CGTOOLS_DSP");

/* linker options */

C674.lnkOpts.suffix += " --zero_init=off ";
C674.lnkOpts.suffix += " --dynamic --retain=_Ipc_ResetVector";

/* compiler options                                */
C674.ccOpts.suffix += " -DTI_816X_BUILD -DPLATFORM_EVM_SI -DSYSLINK_BUILD_RTOS -DUSE_SYSLINK_NOTIFY=0";

C674.platforms = ["ti.platforms.evmTI816X:plat"];
C674.platform = C674.platforms[0];

/* list interested targets in Build.targets array  */
Build.targets = [
                    M3,
                    C674,
                ];

var KB=1024;
var MB=KB*KB;

var DDR3_ADDR;
var DDR3_SIZE;

var OCMC0_ADDR;
var OCMC1_ADDR;
var OCMC_SIZE;

var LINUX_ADDR;
var LINUX_SIZE;

var SR0_ADDR;
var SR0_SIZE;

var SR1_ADDR;
var SR1_SIZE;

var SR3_INTRADUCATI_IPC_ADDR;
var SR3_INTRADUCATI_IPC_SIZE;

var VIDEO_M3_CODE_ADDR;
var VIDEO_M3_CODE_SIZE;

var VIDEO_M3_DATA_ADDR;
var VIDEO_M3_DATA_SIZE;

var SR2_FRAME_BUFFER_ADDR;
var SR2_FRAME_BUFFER_SIZE;

var DSS_M3_CODE_ADDR;
var DSS_M3_CODE_SIZE;

var DSS_M3_DATA_ADDR;
var DSS_M3_DATA_SIZE;

var DSP_CODE_ADDR;
var DSP_CODE_SIZE;

var DSP_M3_DATA_ADDR;
var DSP_M3_DATA_SIZE;

var TILER_ADDR;
var TILER_SIZE;

var HDVPSS_DESC_ADDR;
var HDVPSS_DESC_SIZE;

var HDVPSS_SHARED_ADDR;
var HDVPSS_SHARED_SIZE;

var NOTIFY_SHARED_ADDR;
var NOTIFY_SHARED_SIZE;

var REMOTE_DEBUG_ADDR;
var REMOTE_DEBUG_SIZE;

DDR3_ADDR                  = 0x80000000;
DDR3_SIZE                  = 2048*MB;

OCMC0_ADDR                 = 0x40300000;
OCMC1_ADDR                 = 0x40400000;
OCMC0_RUN_ADDR             = 0x00300000;
OCMC1_RUN_ADDR             = 0x00400000;
OCMC_SIZE                  = 256*KB;

L2_SRAM_ADDR               = 0x55024000;
L2_SRAM_SIZE               = 128*KB;
L2_SRAM_RUN_ADDR           = 0x20004000;

DUCATI_WB_WA_ADDR          = 0x20000000;

/* first 512MB */
LINUX_SIZE                 = 128*MB;
SR1_SIZE                   = 336*MB;
SR3_INTRADUCATI_IPC_SIZE   =          124*KB;
VIDEO_M3_CODE_SIZE         =  2*MB  + 512*KB;
VIDEO_M3_BSS_SIZE          =  9*MB  + 512*KB;
VIDEO_M3_DATA_SIZE         =  2*MB  + 512*KB;
DSS_M3_CODE_SIZE           =  1*MB  + 512*KB;
DSS_M3_BSS_SIZE            = 11*MB  + 512*KB;
DSS_M3_DATA_SIZE           =  5*MB  + 512*KB;
DSP_CODE_SIZE              =  1*MB;
DSP_DATA_SIZE              = 13*MB  + 900*KB;



/* second 512MB */
/* Tiler Buffers in the bottom 512MB */
TILER_SIZE                  = 256*MB; /* (128+128) - MUST be aligned on 128MB boundary */
SR2_FRAME_BUFFER_SIZE       = 234*MB - 256*KB;
SR0_SIZE                    = 15*MB;
VIDEO_M3_EXCEPTION_CTX_SIZE = 128*KB;
VPSS_M3_EXCEPTION_CTX_SIZE  = 128*KB;
HDVPSS_DESC_SIZE            = 2*MB;
HDVPSS_SHARED_SIZE          = 2*MB;
NOTIFY_SHARED_SIZE          = 2*MB;
REMOTE_DEBUG_SIZE           = 1*MB;

/* third and fourth 512 MB */
LINUX_SIZE_SEGMENT2        = 1024*MB;
print ("Memory Map - 2GB DDR, > 1GB Linux in 2 segments");

print ("  0x80000000     +-------------------+");
print ("         ^       |                   |");
print ("         |       |  " + (LINUX_SIZE / MB) + " MB           | Linux");
print ("         |       |                   |");
print ("         |       +-------------------+");
print ("         |       |  " + (SR1_SIZE / MB) + "MB          | (SR1) Bitstream buffer");
print ("         |       |                   | Cached on A8. Cached on M3, although access by DMAs");
print ("         |       +-------------------+ ");
print ("         |       |   " + (SR3_INTRADUCATI_IPC_SIZE / KB) + " KB          | (SR3)InterDucati IPC ListMP .Cached on M3 ");
print ("         |       +-------------------+  ");          
print ("         +       |   " + (VIDEO_M3_CODE_SIZE / MB) + " MB          | Video M3 Code");
print ("       512 MB    +-------------------+");
print ("         +       |   " + (VIDEO_M3_BSS_SIZE / MB) + " MB         | Video M3 BSS");
print ("         |       +-------------------+");
print ("         |       |   " + (VIDEO_M3_DATA_SIZE / MB) + " MB          | Video  M3 Data");
print ("         |       +-------------------+");
print ("         |       |   " + (DSS_M3_CODE_SIZE/ MB) + " MB          | VPSS  M3 Code");
print ("         |       +-------------------+");
print ("         |       |   " + (DSS_M3_BSS_SIZE/ MB) + " MB         | VPSS  M3 BSS");
print ("         |       +-------------------+");
print ("         |       |   " + (DSS_M3_DATA_SIZE/ MB) + " MB           | VPSS  M3 Data");
print ("         |       +-------------------+");
print ("         |       |   " + ( DSP_CODE_SIZE / KB) + " KB          | DSP Code");
print ("         |       +-------------------+");
print ("         v       |   " + (DSP_DATA_SIZE / MB) + " MB         | DSP Data");
print ("  0xA0000000     +-------------------+");
print ("         ^       |   " + (TILER_SIZE / MB) + " MB          | Tiled 8-bit + 16-bit region");
print ("         |       +-------------------+");
print ("         |       |  " + (SR2_FRAME_BUFFER_SIZE / MB) + " MB        | (SR2) Frame Buffer Region - <VPSS - Video M3 Frame Buf>");
print ("         |       +-------------------+  ");
print ("         +       |                   |");
print ("       512 MB    |  " + (SR0_SIZE / MB) + " MB            | (SR0) Syslink MsgQ/IPC List MP - <Non-cached on M3>");
print ("         +       +-------------------+");
print ("         |       |  " + (VIDEO_M3_EXCEPTION_CTX_SIZE / KB) + " KB           | Video M3 exception context");
print ("         |       +-------------------+  ");
print ("         |       |  " + (VPSS_M3_EXCEPTION_CTX_SIZE / KB) + "KB            | Vpss M3 exception context");
print ("         |       +-------------------+  ");
print ("         |       |  " + (HDVPSS_DESC_SIZE / MB) + " MB             | VPSS M3 - VPDMA Descriptor");
print ("         |       +-------------------+");
print ("         |       |  " + (HDVPSS_SHARED_SIZE / MB) + " MB             | VPSS M3 - FBDev Shared Memory");
print ("         |       +-------------------+");
print ("         |       |  " + (NOTIFY_SHARED_SIZE / MB) + " MB             | Host - VPSS M3 Notify(For FBDev)");
print ("         |       +-------------------+");
print ("         v       |  " + (REMOTE_DEBUG_SIZE / MB) + " MB             | Remote Debug Print");
print ("   0xC0000000    +-------------------+");
print ("         ^       |                   |");
print ("         |       |                   |");
print ("         |       |  " + (LINUX_SIZE_SEGMENT2 / MB) + " MB          | Memory for Linux Kernel");
print ("         |       |                   |" + " Available only in split of linux kernel");
print ("         |       |                   |");
print ("         v       |                   |");
print ("   0xFFFFFFFF    +-------------------+");


/* first 512MB */
LINUX_ADDR                 = DDR3_ADDR;
SR1_ADDR                   = LINUX_ADDR						 + LINUX_SIZE;
SR3_INTRADUCATI_IPC_ADDR   = SR1_ADDR						 + SR1_SIZE;
VIDEO_M3_CODE_ADDR         = SR3_INTRADUCATI_IPC_ADDR		 + SR3_INTRADUCATI_IPC_SIZE;
VIDEO_M3_DATA_ADDR         = VIDEO_M3_CODE_ADDR				 + VIDEO_M3_CODE_SIZE;
VIDEO_M3_BSS_ADDR          = VIDEO_M3_DATA_ADDR				 + VIDEO_M3_DATA_SIZE;
VIDEO_M3_BSS_MAPPED_ADDR   = (VIDEO_M3_BSS_ADDR - DDR3_ADDR) + DUCATI_WB_WA_ADDR;
DSS_M3_CODE_ADDR           = VIDEO_M3_BSS_ADDR				 + VIDEO_M3_BSS_SIZE;
DSS_M3_DATA_ADDR           = DSS_M3_CODE_ADDR				 + DSS_M3_CODE_SIZE;
DSS_M3_BSS_ADDR            = DSS_M3_DATA_ADDR				 + DSS_M3_DATA_SIZE;
DSS_M3_BSS_MAPPED_ADDR     = (DSS_M3_BSS_ADDR - DDR3_ADDR)	 + DUCATI_WB_WA_ADDR;
DSP_CODE_ADDR              = DSS_M3_BSS_ADDR				 + DSS_M3_BSS_SIZE;
DSP_DATA_ADDR              = DSP_CODE_ADDR					 + DSP_CODE_SIZE;

/* second 512MB */
/* Tiler Buffers in the bottom 512MB */
TILER_ADDR                  = DDR3_ADDR						+ DDR3_SIZE/4;
SR2_FRAME_BUFFER_ADDR       = TILER_ADDR					+ TILER_SIZE;
VIDEO_M3_EXCEPTION_CTX_ADDR = SR2_FRAME_BUFFER_ADDR			+ SR2_FRAME_BUFFER_SIZE;
VPSS_M3_EXCEPTION_CTX_ADDR  = VIDEO_M3_EXCEPTION_CTX_ADDR	+ VIDEO_M3_EXCEPTION_CTX_SIZE;
HDVPSS_DESC_ADDR            = VPSS_M3_EXCEPTION_CTX_ADDR	+ VPSS_M3_EXCEPTION_CTX_SIZE;
HDVPSS_SHARED_ADDR          = HDVPSS_DESC_ADDR				+ HDVPSS_DESC_SIZE;
NOTIFY_SHARED_ADDR          = HDVPSS_SHARED_ADDR			+ HDVPSS_SHARED_SIZE;
REMOTE_DEBUG_ADDR           = NOTIFY_SHARED_ADDR			+ NOTIFY_SHARED_SIZE;
SR0_ADDR                    = REMOTE_DEBUG_ADDR			    + REMOTE_DEBUG_SIZE;

if ((DSP_DATA_ADDR + DSP_DATA_SIZE) > TILER_ADDR)
{
  throw xdc.$$XDCException("MEMORY_MAP OVERFLOW ERROR ",
                           "\nRegion End: " + "0x" + java.lang.Long.toHexString(TILER_ADDR) + 
                           "\nActual End: " + "0x" + java.lang.Long.toHexString(DSP_DATA_ADDR + DSP_DATA_SIZE ));
}

if ((SR0_ADDR + SR0_SIZE) > DDR3_ADDR + DDR3_SIZE/2)
{
  throw xdc.$$XDCException("MEMORY_MAP OVERFLOW ERROR ",
                           "\nRegion End: " + "0x" + java.lang.Long.toHexString(DDR3_ADDR + DDR3_SIZE) + 
                           "\nActual End: " + "0x" + java.lang.Long.toHexString(SR0_ADDR + SR0_SIZE)
						  );
}

Build.platformTable["ti.platforms.evmTI816X:core1"] =
{
    externalMemoryMap:
    [
        ["DDR3_RAM", {
            comment: "DDR3_RAM",
            name: "DDR3_RAM",
            base: DDR3_ADDR,
            len:  DDR3_SIZE
        }],
        ["OCMC1_RAM", {
            comment: "OCMC1_RAM",
            name: "OCMC1_RAM",
            base: OCMC1_ADDR,
            len:  OCMC_SIZE
        }],
        ["VIDEO_M3_BSS_MAPPED_MEM", {
            comment : "VIDEO_M3_BSS_MAPPED_MEM",
            name    : "VIDEO_M3_BSS_MAPPED_MEM",
            base    : VIDEO_M3_BSS_MAPPED_ADDR,
            len     : VIDEO_M3_BSS_SIZE
        }],
        ["DSS_M3_BSS_MAPPED_MEM", {
            comment : "DSS_M3_BSS_MAPPED_MEM",
            name    : "DSS_M3_BSS_MAPPED_MEM",
            base    : DSS_M3_BSS_MAPPED_ADDR,
            len     : DSS_M3_BSS_SIZE
        }],
    ],
    customMemoryMap:
    [
        ["LINUX_MEM", {
            comment : "LINUX_MEM",
            name    : "LINUX_MEM",
            base    : LINUX_ADDR,
            len     : LINUX_SIZE
        }],
        ["SR1", {
            comment : "SR1",
            name    : "SR1",
            base    : SR1_ADDR,
            len     : SR1_SIZE
        }],
        ["SR3_INTRADUCATI_IPC", {
            comment : "SR3_INTRADUCATI_IPC",
            name    : "SR3_INTRADUCATI_IPC",
            base    : SR3_INTRADUCATI_IPC_ADDR,
            len     : SR3_INTRADUCATI_IPC_SIZE
        }],
        ["VIDEO_M3_CODE_MEM", {
            comment : "VIDEO_M3_CODE_MEM",
            name    : "VIDEO_M3_CODE_MEM",
            base    : VIDEO_M3_CODE_ADDR,
            len     : VIDEO_M3_CODE_SIZE
        }],
        ["VIDEO_M3_DATA_MEM", {
            comment : "VIDEO_M3_DATA_MEM",
            name    : "VIDEO_M3_DATA_MEM",
            base    : VIDEO_M3_DATA_ADDR,
            len     : VIDEO_M3_DATA_SIZE
        }],
        ["VIDEO_M3_BSS_MEM", {
            comment : "VIDEO_M3_BSS_MEM",
            name    : "VIDEO_M3_BSS_MEM",
            base    : VIDEO_M3_BSS_ADDR,
            len     : VIDEO_M3_BSS_SIZE
        }],
        ["VIDEO_M3_BSS_MAPPED_MEM", {
            comment : "VIDEO_M3_BSS_MAPPED_MEM",
            name    : "VIDEO_M3_BSS_MAPPED_MEM",
            base    : VIDEO_M3_BSS_MAPPED_ADDR,
            len     : VIDEO_M3_BSS_SIZE
        }],
        ["DSS_M3_CODE_MEM", {
            comment : "DSS_M3_CODE_MEM",
            name    : "DSS_M3_CODE_MEM",
            base    : DSS_M3_CODE_ADDR,
            len     : DSS_M3_CODE_SIZE
        }],
        ["DDR3_M3", {
            comment : "DDR3_M3",
            name    : "DDR3_M3",
            base    : DSS_M3_DATA_ADDR,
            len     : DSS_M3_DATA_SIZE
        }],
        ["DSS_M3_BSS_MEM", {
            comment : "DSS_M3_BSS_MEM",
            name    : "DSS_M3_BSS_MEM",
            base    : DSS_M3_BSS_ADDR,
            len     : DSS_M3_BSS_SIZE
        }],
        ["DSS_M3_BSS_MAPPED_MEM", {
            comment : "DSS_M3_BSS_MAPPED_MEM",
            name    : "DSS_M3_BSS_MAPPED_MEM",
            base    : DSS_M3_BSS_MAPPED_ADDR,
            len     : DSS_M3_BSS_SIZE
        }],
        ["DSP_CODE_MEM", {
            comment : "DSP_CODE_MEM",
            name    : "DSP_CODE_MEM",
            base    : DSP_CODE_ADDR,
            len     : DSP_CODE_SIZE
        }],
        ["DSP_DATA_MEM", {
            comment : "DSP_DATA_MEM",
            name    : "DSP_DATA_MEM",
            base    : DSP_DATA_ADDR,
            len     : DSP_DATA_SIZE
        }],
        ["TILER_MEM", {
            comment : "TILER_MEM",
            name    : "TILER_MEM",
            base    : TILER_ADDR,
            len     : TILER_SIZE
        }],
        ["SR2_FRAME_BUFFER_MEM", {
            comment : "SR2_FRAME_BUFFER_MEM",
            name    : "SR2_FRAME_BUFFER_MEM",
            base    : SR2_FRAME_BUFFER_ADDR,
            len     : SR2_FRAME_BUFFER_SIZE
        }],
        ["SR0", {
            comment : "SR0",
            name    : "SR0",
            base    : SR0_ADDR,
            len     : SR0_SIZE
        }],
        ["VIDEO_M3_EXCEPTION_CTX", {
            comment : "VIDEO_M3_EXCEPTION_CTX",
            name    : "VIDEO_M3_EXCEPTION_CTX",
            base    : VIDEO_M3_EXCEPTION_CTX_ADDR,
            len     : VIDEO_M3_EXCEPTION_CTX_SIZE
        }],
        ["VPSS_M3_EXCEPTION_CTX", {
            comment : "VPSS_M3_EXCEPTION_CTX",
            name    : "VPSS_M3_EXCEPTION_CTX",
            base    : VPSS_M3_EXCEPTION_CTX_ADDR,
            len     : VPSS_M3_EXCEPTION_CTX_SIZE
        }],
        ["HDVPSS_DESC_MEM", {
            comment : "HDVPSS_DESC_MEM",
            name    : "HDVPSS_DESC_MEM",
            base    : HDVPSS_DESC_ADDR,
            len     : HDVPSS_DESC_SIZE
        }],
        ["HDVPSS_SHARED_MEM", {
            comment : "HDVPSS_SHARED_MEM",
            name    : "HDVPSS_SHARED_MEM",
            base    : HDVPSS_SHARED_ADDR,
            len     : HDVPSS_SHARED_SIZE
        }],
        ["HOST_VPSS_NOTIFYMEM", {
            comment : "HOST_VPSS_NOTIFYMEM",
            name    : "HOST_VPSS_NOTIFYMEM",
            base    : NOTIFY_SHARED_ADDR,
            len     : NOTIFY_SHARED_SIZE
        }],
        ["REMOTE_DEBUG_MEM", {
            comment : "REMOTE_DEBUG_MEM",
            name    : "REMOTE_DEBUG_MEM",
            base    : REMOTE_DEBUG_ADDR,
            len     : REMOTE_DEBUG_SIZE
        }],
        ["L2_ROM", {
            comment: "L2_ROM",
            name: "L2_ROM",
            base: 0x00000000,
            len:  0x00004000
        }],
        ["OCMC1_RAM", {
            comment: "OCMC1_RAM",
            name: "OCMC1_RAM",
            base: OCMC1_ADDR,
            len:  OCMC_SIZE
        }],
        ["OCMC1_RAM_MAPPED", {
            comment: "OCMC1_RAM",
            name: "OCMC1_RAM_MAPPED",
            base: OCMC1_RUN_ADDR,
            len:  OCMC_SIZE
        }],
    ]
};

Build.platformTable["ti.platforms.evmTI816X:core0"] =
{
    externalMemoryMap:
    [
        ["DDR3_RAM", {
            comment: "DDR3_RAM",
            name: "DDR3_RAM",
            base: DDR3_ADDR,
            len:  DDR3_SIZE
        }],
        ["OCMC0_RAM", {
            comment: "OCMC0_RAM",
            name: "OCMC0_RAM",
            base: OCMC0_ADDR,
            len:  OCMC_SIZE
        }],
        ["VIDEO_M3_BSS_MAPPED_MEM", {
            comment : "VIDEO_M3_BSS_MAPPED_MEM",
            name    : "VIDEO_M3_BSS_MAPPED_MEM",
            base    : VIDEO_M3_BSS_MAPPED_ADDR,
            len     : VIDEO_M3_BSS_SIZE
        }],
        ["DSS_M3_BSS_MAPPED_MEM", {
            comment : "DSS_M3_BSS_MAPPED_MEM",
            name    : "DSS_M3_BSS_MAPPED_MEM",
            base    : DSS_M3_BSS_MAPPED_ADDR,
            len     : DSS_M3_BSS_SIZE
        }],
        ["L2_SRAM", {
            comment: "L2_SRAM",
            name: "L2_SRAM",
            base: L2_SRAM_ADDR,
            len:  L2_SRAM_SIZE
        }],
        ["L2_SRAM_RUN", {
            comment: "L2_SRAM_RUN",
            name: "L2_SRAM_RUN",
            base: L2_SRAM_RUN_ADDR,
            len:  L2_SRAM_SIZE
        }],
    ],
    customMemoryMap:
    [
        ["LINUX_MEM", {
            comment : "LINUX_MEM",
            name    : "LINUX_MEM",
            base    : LINUX_ADDR,
            len     : LINUX_SIZE
        }],
        ["SR1", {
            comment : "SR1",
            name    : "SR1",
            base    : SR1_ADDR,
            len     : SR1_SIZE
        }],
        ["SR3_INTRADUCATI_IPC", {
            comment : "SR3_INTRADUCATI_IPC",
            name    : "SR3_INTRADUCATI_IPC",
            base    : SR3_INTRADUCATI_IPC_ADDR,
            len     : SR3_INTRADUCATI_IPC_SIZE
        }],
        ["VIDEO_M3_CODE_MEM", {
            comment : "VIDEO_M3_CODE_MEM",
            name    : "VIDEO_M3_CODE_MEM",
            base    : VIDEO_M3_CODE_ADDR,
            len     : VIDEO_M3_CODE_SIZE
        }],
        ["DDR_M3", {
            comment : "DDR3_M3",
            name    : "DDR3_M3",
            base    : VIDEO_M3_DATA_ADDR,
            len     : VIDEO_M3_DATA_SIZE
        }],
        ["VIDEO_M3_BSS_MEM", {
            comment : "VIDEO_M3_BSS_MEM",
            name    : "VIDEO_M3_BSS_MEM",
            base    : VIDEO_M3_BSS_ADDR,
            len     : VIDEO_M3_BSS_SIZE
        }],
        ["VIDEO_M3_BSS_MAPPED_MEM", {
            comment : "VIDEO_M3_BSS_MAPPED_MEM",
            name    : "VIDEO_M3_BSS_MAPPED_MEM",
            base    : VIDEO_M3_BSS_MAPPED_ADDR,
            len     : VIDEO_M3_BSS_SIZE
        }],
        ["DSS_M3_CODE_MEM", {
            comment : "DSS_M3_CODE_MEM",
            name    : "DSS_M3_CODE_MEM",
            base    : DSS_M3_CODE_ADDR,
            len     : DSS_M3_CODE_SIZE
        }],
        ["DSS_M3_BSS_MEM", {
            comment : "DSS_M3_BSS_MEM",
            name    : "DSS_M3_BSS_MEM",
            base    : DSS_M3_BSS_ADDR,
            len     : DSS_M3_BSS_SIZE
        }],
        ["DSS_M3_BSS_MAPPED_MEM", {
            comment : "DSS_M3_BSS_MAPPED_MEM",
            name    : "DSS_M3_BSS_MAPPED_MEM",
            base    : DSS_M3_BSS_MAPPED_ADDR,
            len     : DSS_M3_BSS_SIZE
        }],
        ["DSS_M3_DATA_MEM", {
            comment : "DSS_M3_DATA_MEM",
            name    : "DSS_M3_DATA_MEM",
            base    : DSS_M3_DATA_ADDR,
            len     : DSS_M3_DATA_SIZE
        }],
        ["DSP_CODE_MEM", {
            comment : "DSP_CODE_MEM",
            name    : "DSP_CODE_MEM",
            base    : DSP_CODE_ADDR,
            len     : DSP_CODE_SIZE
        }],
        ["DSP_DATA_MEM", {
            comment : "DSP_DATA_MEM",
            name    : "DSP_DATA_MEM",
            base    : DSP_DATA_ADDR,
            len     : DSP_DATA_SIZE
        }],
        ["TILER_MEM", {
            comment : "TILER_MEM",
            name    : "TILER_MEM",
            base    : TILER_ADDR,
            len     : TILER_SIZE
        }],
        ["SR2_FRAME_BUFFER_MEM", {
            comment : "SR2_FRAME_BUFFER_MEM",
            name    : "SR2_FRAME_BUFFER_MEM",
            base    : SR2_FRAME_BUFFER_ADDR,
            len     : SR2_FRAME_BUFFER_SIZE
        }],
        ["SR0", {
            comment : "SR0",
            name    : "SR0",
            base    : SR0_ADDR,
            len     : SR0_SIZE
        }],
        ["VIDEO_M3_EXCEPTION_CTX", {
            comment : "VIDEO_M3_EXCEPTION_CTX",
            name    : "VIDEO_M3_EXCEPTION_CTX",
            base    : VIDEO_M3_EXCEPTION_CTX_ADDR,
            len     : VIDEO_M3_EXCEPTION_CTX_SIZE
        }],
        ["VPSS_M3_EXCEPTION_CTX", {
            comment : "VPSS_M3_EXCEPTION_CTX",
            name    : "VPSS_M3_EXCEPTION_CTX",
            base    : VPSS_M3_EXCEPTION_CTX_ADDR,
            len     : VPSS_M3_EXCEPTION_CTX_SIZE
        }],
        ["HDVPSS_DESC_MEM", {
            comment : "HDVPSS_DESC_MEM",
            name    : "HDVPSS_DESC_MEM",
            base    : HDVPSS_DESC_ADDR,
            len     : HDVPSS_DESC_SIZE
        }],
        ["HDVPSS_SHARED_MEM", {
            comment : "HDVPSS_SHARED_MEM",
            name    : "HDVPSS_SHARED_MEM",
            base    : HDVPSS_SHARED_ADDR,
            len     : HDVPSS_SHARED_SIZE
        }],
        ["HOST_VPSS_NOTIFYMEM", {
            comment : "HOST_VPSS_NOTIFYMEM",
            name    : "HOST_VPSS_NOTIFYMEM",
            base    : NOTIFY_SHARED_ADDR,
            len     : NOTIFY_SHARED_SIZE
        }],
        ["REMOTE_DEBUG_MEM", {
            comment : "REMOTE_DEBUG_MEM",
            name    : "REMOTE_DEBUG_MEM",
            base    : REMOTE_DEBUG_ADDR,
            len     : REMOTE_DEBUG_SIZE
        }],
        ["L2_SRAM", {
            comment: "L2_SRAM",
            name: "L2_SRAM",
            base: L2_SRAM_ADDR,
            len:  L2_SRAM_SIZE
        }],
        ["L2_SRAM_RUN", {
            comment: "L2_SRAM_RUN",
            name: "L2_SRAM_RUN",
            base: L2_SRAM_RUN_ADDR,
            len:  L2_SRAM_SIZE
        }],
        ["L2_ROM", {
            comment: "L2_ROM",
            name: "L2_ROM",
            base: 0x00000000,
            len:  0x00004000
        }],
        ["OCMC0_RAM", {
            comment: "OCMC0_RAM",
            name: "OCMC0_RAM",
            base: OCMC0_ADDR,
            len:  OCMC_SIZE
        }],
        ["OCMC0_RAM_MAPPED", {
            comment: "OCMC0_RAM",
            name: "OCMC0_RAM_MAPPED",
            base: OCMC0_RUN_ADDR,
            len:  OCMC_SIZE
        }],
    ]
};

Build.platformTable["ti.platforms.evmTI816X:plat"] =
{
    externalMemoryMap:
    [
        ["DDR3_RAM", {
            comment: "DDR3_RAM",
            name: "DDR3_RAM",
            base: DDR3_ADDR,
            len:  DDR3_SIZE
        }],
        ["OCMC0_RAM", {
            comment: "OCMC0_RAM",
            name: "OCMC0_RAM",
            base: OCMC0_ADDR,
            len:  OCMC_SIZE
        }],
        ["OCMC1_RAM", {
            comment: "OCMC1_RAM",
            name: "OCMC1_RAM",
            base: OCMC1_ADDR,
            len:  OCMC_SIZE
        }],
    ],
    customMemoryMap:
    [
        ["LINUX_MEM", {
            comment : "LINUX_MEM",
            name    : "LINUX_MEM",
            base    : LINUX_ADDR,
            len     : LINUX_SIZE
        }],
        ["SR1", {
            comment : "SR1",
            name    : "SR1",
            base    : SR1_ADDR,
            len     : SR1_SIZE
        }],
        ["SR3_INTRADUCATI_IPC", {
            comment : "SR3_INTRADUCATI_IPC",
            name    : "SR3_INTRADUCATI_IPC",
            base    : SR3_INTRADUCATI_IPC_ADDR,
            len     : SR3_INTRADUCATI_IPC_SIZE
        }],
        ["VIDEO_M3_CODE_MEM", {
            comment : "VIDEO_M3_CODE_MEM",
            name    : "VIDEO_M3_CODE_MEM",
            base    : VIDEO_M3_CODE_ADDR,
            len     : VIDEO_M3_CODE_SIZE
        }],
        ["VIDEO_M3_DATA_MEM", {
            comment : "VIDEO_M3_DATA_MEM",
            name    : "VIDEO_M3_DATA_MEM",
            base    : VIDEO_M3_DATA_ADDR,
            len     : VIDEO_M3_DATA_SIZE
        }],
        ["VIDEO_M3_BSS_MEM", {
            comment : "VIDEO_M3_BSS_MEM",
            name    : "VIDEO_M3_BSS_MEM",
            base    : VIDEO_M3_BSS_ADDR,
            len     : VIDEO_M3_BSS_SIZE
        }],
        ["DSS_M3_CODE_MEM", {
            comment : "DSS_M3_CODE_MEM",
            name    : "DSS_M3_CODE_MEM",
            base    : DSS_M3_CODE_ADDR,
            len     : DSS_M3_CODE_SIZE
        }],
        ["DSS_M3_DATA_MEM", {
            comment : "DSS_M3_DATA_MEM",
            name    : "DSS_M3_DATA_MEM",
            base    : DSS_M3_DATA_ADDR,
            len     : DSS_M3_DATA_SIZE
        }],
        ["DSS_M3_BSS_MEM", {
            comment : "DSS_M3_BSS_MEM",
            name    : "DSS_M3_BSS_MEM",
            base    : DSS_M3_BSS_ADDR,
            len     : DSS_M3_BSS_SIZE
        }],
        ["DSP_CODE_MEM", {
            comment : "DSP_CODE_MEM",
            name    : "DSP_CODE_MEM",
            base    : DSP_CODE_ADDR,
            len     : DSP_CODE_SIZE
        }],
        ["DSP_DATA_MEM", {
            comment : "DDR3_DSP",
            name    : "DDR3_DSP",
            base    : DSP_DATA_ADDR,
            len     : DSP_DATA_SIZE
        }],
        ["TILER_MEM", {
            comment : "TILER_MEM",
            name    : "TILER_MEM",
            base    : TILER_ADDR,
            len     : TILER_SIZE
        }],
        ["SR2_FRAME_BUFFER_MEM", {
            comment : "SR2_FRAME_BUFFER_MEM",
            name    : "SR2_FRAME_BUFFER_MEM",
            base    : SR2_FRAME_BUFFER_ADDR,
            len     : SR2_FRAME_BUFFER_SIZE
        }],
        ["SR0", {
            comment : "SR0",
            name    : "SR0",
            base    : SR0_ADDR,
            len     : SR0_SIZE
        }],
        ["VIDEO_M3_EXCEPTION_CTX", {
            comment : "VIDEO_M3_EXCEPTION_CTX",
            name    : "VIDEO_M3_EXCEPTION_CTX",
            base    : VIDEO_M3_EXCEPTION_CTX_ADDR,
            len     : VIDEO_M3_EXCEPTION_CTX_SIZE
        }],
        ["VPSS_M3_EXCEPTION_CTX", {
            comment : "VPSS_M3_EXCEPTION_CTX",
            name    : "VPSS_M3_EXCEPTION_CTX",
            base    : VPSS_M3_EXCEPTION_CTX_ADDR,
            len     : VPSS_M3_EXCEPTION_CTX_SIZE
        }],
        ["HDVPSS_DESC_MEM", {
            comment : "HDVPSS_DESC_MEM",
            name    : "HDVPSS_DESC_MEM",
            base    : HDVPSS_DESC_ADDR,
            len     : HDVPSS_DESC_SIZE
        }],
        ["HDVPSS_SHARED_MEM", {
            comment : "HDVPSS_SHARED_MEM",
            name    : "HDVPSS_SHARED_MEM",
            base    : HDVPSS_SHARED_ADDR,
            len     : HDVPSS_SHARED_SIZE
        }],
        ["HOST_VPSS_NOTIFYMEM", {
            comment : "HOST_VPSS_NOTIFYMEM",
            name    : "HOST_VPSS_NOTIFYMEM",
            base    : NOTIFY_SHARED_ADDR,
            len     : NOTIFY_SHARED_SIZE
        }],
        ["REMOTE_DEBUG_MEM", {
            comment : "REMOTE_DEBUG_MEM",
            name    : "REMOTE_DEBUG_MEM",
            base    : REMOTE_DEBUG_ADDR,
            len     : REMOTE_DEBUG_SIZE
        }],
        ["OCMC0_RAM", {
            comment: "OCMC0_RAM",
            name: "OCMC0_RAM",
            base: OCMC0_ADDR,
            len:  OCMC_SIZE
        }],
        ["OCMC1_RAM", {
            comment: "OCMC1_RAM",
            name: "OCMC1_RAM",
            base: OCMC1_ADDR,
            len:  OCMC_SIZE
        }],
        ["DSP_L2_RAM", {
            comment: "DSP_L2_RAM",
            name: "DSP_L2_RAM",
            base: 0x10800000,
            len:  0x00020000
        }],            
    ],
    l1PMode: "32k",
    l1DMode: "32k",
    l2Mode:  "128k"
};

var addrFileGenerated = false;
if (addrFileGenerated == false)
{
    xdc.loadCapsule("genaddrinfo.xs").GenAddrFile();
    addrFileGenerated = true;
}

I saw LINUX_SIZE = 128*MB and LINUX_SIZE_SEGMENT2 = 1024*MB in config_2G.bld.

What does it mean? Per my understanding, the available memory size for Linux is 256MB or 512MB depends on bootargs setting. Do I misunderstand it?

"For using the 2G for video frame buffers". what does it exactly mean?

Sorry for many questions and appreciate for your advise.

If you are using config_2G you should set your mem=128M in the kernel bootargs.I beleive this was the reason for the crash  you were seeing.THis should have been flagged as error when running init.sh which validates the kernel bootargs.Are you always deleting your target/opt/dvr_rdk/ti816x and copying from the dvr_rdk/../target/rfs_816x/opt/dvr_rdk/ti816x folder.

There are couple of ways you can use 2G of memory:

1. Use the regular 1G memory map and use the remaining 1G for your linux application.

2. Use 2G  RDK memory map which allocates more memory for video frame buffers. This enables you to create new usecases which require more memory than what can fit in standard 1G memory map.For example if you want to create 16 ch 1080P decode channels

Hello, Badri

In the  two ways you mentioned, please correct me as below:

1. Use the regular 1G memory map and use the remaining 1G for your linux application

    Step 1: Set DDR_MEM := DDR_MEM_1024M in Rules.make

    Step 2: Set mem=256M in bootargs.

    With these above two steps,  config_1G_256MLinux.bld will be adopted for memory mapping, right?

     What additional step do I need to use remaining 1G for my LInux application?

2. Use 2G  RDK memory map which allocates more memory for video frame buffers. This enables you to create new usecases which require more memory than what can fit in standard 1G memory map.For example if you want to create 16 ch 1080P decode channels

    Step 1: Set DDR_MEM := DDR_MEM_2048M in Rules.make

    Step 2: Set mem=128M in bootargs

    Is it correct & do I miss any step?

    With above 2G settings, How many memory are allocated for Linux kernel and application ?

Best regards.

1. Use the regular 1G memory map and use the remaining 1G for your linux application Step 1: Set DDR_MEM := DDR_MEM_1024M in Rules.make Step 2: Set mem=256M in bootargs. With these above two steps, config_1G_256MLinux.bld will be adopted for memory mapping, right? What additional step do I need to use remaining 1G for my LInux application?

   -- Yes that is correct. Additionally in your kernel bootargs set mem=128M mem=512M@0xC0000000

2. Use 2G  RDK memory map which allocates more memory for video frame buffers. This enables you to create new usecases which require more memory than what can fit in standard 1G memory map.For example if you want to create 16 ch 1080P decode channels

    Step 1: Set DDR_MEM := DDR_MEM_2048M in Rules.make

    Step 2: Set mem=128M in bootargs

    Is it correct & do I miss any step?

    With above 2G settings, How many memory are allocated for Linux kernel and application ?

  - Yes that is correct. Memory for linux is 128M + 768M

Hello, Badri

        Thanks. It's really help.

        Few confusion as below:

1. Use the regular 1G memory map and use the remaining 1G for your linux application Step 1: Set DDR_MEM := DDR_MEM_1024M in Rules.make Step 2: Set mem=256M in bootargs. With these above two steps, config_1G_256MLinux.bld will be adopted for memory mapping, right? What additional step do I need to use remaining 1G for my LInux application?

   -- Yes that is correct. Additionally in your kernel bootargs set mem=128M mem=512M@0xC0000000

      => Sorry I get a little bit confused. is mem=128M a typo?

2. Use 2G  RDK memory map which allocates more memory for video frame buffers. This enables you to create new usecases which require more memory than what can fit in standard 1G memory map.For example if you want to create 16 ch 1080P decode channels

    Step 1: Set DDR_MEM := DDR_MEM_2048M in Rules.make

    Step 2: Set mem=128M in bootargs

    Is it correct & do I miss any step?

    With above 2G settings, How many memory are allocated for Linux kernel and application ?

  - Yes that is correct. Memory for linux is 128M + 768M

    => I saw LINUX_SIZE = 128MB &  LINUX_SIZE_SEGMENT2 = 1024MB in config_2G.bld

         That's why I guess Memory for linux is 128M+1024M.  Why it's 128M+768M ?

Best regards.

Sorry I get a little bit confused. is mem=128M a typo?

  - No this is not typo. In linux PSP that is shipped with RDK 3.0, the linux kernel should start at physical address 0x8000_0000.There is an option to have an additional linux memory segment by specifying mem=<memory_size>@<physical_start_address> so mem=128M mem=512M@0xC0000000 means allocate 128M for linux starting at 0x8000_0000 and additionally allocate 512M at 0xC000_0000 for linux.

That's why I guess Memory for linux is 128M+1024M.  Why it's 128M+768M ?

  - You are right.

No this is not typo. In linux PSP that is shipped with RDK 3.0, the linux kernel should start at physical address 0x8000_0000.There is an option to have an additional linux memory segment by specifying mem=<memory_size>@<physical_start_address> so mem=128M mem=512M@0xC0000000 means allocate 128M for linux starting at 0x8000_0000 and additionally allocate 512M at 0xC000_0000 for linux.

In config_1G_256MLinux.bld, LINUX_SIZE = 256MB.

So, I need to set mem=256M mem=512M@0xC0000000 in bootargs, right?

Yes that is right

Hello, Badri

      Now I totally understand. Thanks for your patient advise.

      I'll try to use 2G configuration now.

      In our last discussion, Is it legal to set additional linux memory segment to 1024M?

      ie:  mem=256M mem=1024M@0xc0000000

I am doubtful mem=1024M@0xc0000000 will work. I have not  tried it.If your kernel boots up it should be fine. My concern is based on the

http://www.arm.linux.org.uk/developer/memory.txt

http://www.kernelport.org/defines.html (Explains the terminology)

Based on below lowmem should end at (ff000000 - VMALLOC_SIZE). This is my understanding and I may be wrong. You can try it out and if kernel boots up there is no issue.

Start		End		Use
--------------------------------------------------------------------------
ffff8000	ffffffff	copy_user_page / clear_user_page use.
				For SA11xx and Xscale, this is used to
				setup a minicache mapping.

ffff1000	ffff7fff	Reserved.
				Platforms must not use this address range.

ffff0000	ffff0fff	CPU vector page.
				The CPU vectors are mapped here if the
				CPU supports vector relocation (control
				register V bit.)

ffc00000	fffeffff	DMA memory mapping region.  Memory returned
				by the dma_alloc_xxx functions will be
				dynamically mapped here.

ff000000	ffbfffff	Reserved for future expansion of DMA
				mapping region.

VMALLOC_END	feffffff	Free for platform use, recommended.
				VMALLOC_END must be aligned to a 2MB
				boundary.

VMALLOC_START	VMALLOC_END-1	vmalloc() / ioremap() space.
				Memory returned by vmalloc/ioremap will
				be dynamically placed in this region.
				VMALLOC_START may be based upon the value
				of the high_memory variable.

PAGE_OFFSET	high_memory-1	Kernel direct-mapped RAM region.
				This maps the platforms RAM, and typically
				maps all platform RAM in a 1:1 relationship.

TASK_SIZE	PAGE_OFFSET-1	Kernel module space
				Kernel modules inserted via insmod are
				placed here using dynamic mappings.

00001000	TASK_SIZE-1	User space mappings
				Per-thread mappings are placed here via
				the mmap() system call.

00000000	00000fff	CPU vector page / null pointer trap
				CPUs which do not support vector remapping
				place their vector page here.  NULL pointer
				dereferences by both the kernel and user
				space are also caught via this mapping.

Hi Badri:

you say "The firmware size are different because we run strip utility after building to strip out debug info."

Could you tell me how to do this then?

xavier

best regards