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SRIO NREAD transfers larger then 256 bytes always failed with timeout.

Du Fu
Intellectual 380 points

Hi.

In our project we developed hardware unit with FPGA Altera Aria II which should be connected with DSP using serial RIO interface with DIO.

Hardware design and FPGA firmware part is done already and we used TMDSEVM6457 for SRIO interface testing data exchange. This connection works smooth and reliable except some minor things for which I requested support here http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/112/t/223308.aspx but still didn't get any answer from TI experts.

We ordered also TMDSEVM6678, and tried to connect with our FPGA board. Doing that we faced with several problems. The major one is that NREAD transfers from DSP side (reading FPGA RIO addresses from DSP) are limited to maximum block size 256 (maximum SRIO single transfer payload size). All NREAD requests with size larger then 256 bytes ALWAYS finished with timeout, and content of only first 256 bytes DSP destination memory updated. We never seen the same with TMDSEVM6457. Any transfer sizes up to 4096 bytes (C6457 limitation) succeeded.

Are there any Keystone specific hints or test-points, which I can check?

Some RIO connection details.

Link speed is 3,125G

Port type is 4x


Thank you.

Dmitry.

  • 0
    TI__Intellectual 2790 points

    Hello Dmitry

    This doesn't directly answer your question, but I thought you would find this helpful. It is major changes from the C64x to the C66x.

    Its hard to just say what to do because I have very little knowledge of what you are doing or what you changed. I see you have Port Type is 4x which should be only for Port 0. I would suggest take a look at the CSR/CAR Registers at B000+ to get a deeper look at what the problem may be. 

    Do you have a GEL file?

    A GEL file is a debugging tool that prints out register values that have been set and potential error reasons/solutions.

    Which CCS IDE are you using? The GEL file I am sending you is for CCS v5 and up. To use the GEL file:
    1. Go to CCS Debug mode on the top right (next to the CCS Edit mode)
    2. Click on Tools->GEL Files
    3. A little window should come up labeled GEL Files. Right click the table and select "Load GEL..."
    4. Select the GEL file I sent you and it should show up in the GEL Files table with Success at the status
    5. Click on Scripts at the top and see all the different tests offered by the GEL File.

    For this case, try using the Errors Scan (both types) and verify that the SRIO is doing what you want to do and check the CSR register values.

    Thanks

    Elush

  • 0 in reply to Elush Shirazpour
    Intellectual 380 points

    Hi Elush.

    Sorry for the delay with reply, our hardware engineer was busy with some other tasks.

    Many thanks for the GEL file, it is excellent helper for c66 SRIO problem analysis.

    Using it we investigated and found some problem in FPGA SRIO IP.

    SRIO interface on c6678 is really fast and reliable and DIO part is much easier to understand and program, comparing with c64p DSP family.

    Thank you again.

    Regards.

    Dmitry.