Hi,
I'd like a clarification. When the EZSDK 5.05's u-boot starts up, it announces that it has 2 GB of DRAM:
TI8148-GP rev 2.1
ARM clk: 600MHz
DDR clk: 400MHz
I2C: ready
DRAM: 2 GiB
NAND: HW ECC BCH8 Selected
256 MiB
MMC: OMAP SD/MMC: 0
I believe that this comes from the contants defined in include/configs/ti8148_evm.h:
#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
#define PHYS_DRAM_1_SIZE 0x40000000 /* 1 GB */
#define PHYS_DRAM_2 0xC0000000 /* DRAM Bank #2 */
#define PHYS_DRAM_2_SIZE 0x40000000 /* 1 GB */
However, the DDR controller setup in evm.c writes DMM LISA MAP values based on constants defined in ddr_defs_ti814x.h:
/*
* TI814X PG2.1 DMM LISA MAPPING
* 1G contiguous section with 128-byte interleaving
*/
#define PG2_1_DMM_LISA_MAP__0 0x0
#define PG2_1_DMM_LISA_MAP__1 0x0
#define PG2_1_DMM_LISA_MAP__2 0x0
#define PG2_1_DMM_LISA_MAP__3 0x80640300
According to the TRM, the "6" in the last constant means "1-GB section". Visual inspection of the EVM also makes me think that there is only 1-GB.
So, are the ti8148_evm.h settings incorrect? For example, should PHYS_DRAM_1_SIZE and PHYS_DRAM_2_SIZE be 0x20000000 (512 MB)? Or, should PHYS_DRAM_2_SIZE be 0?
Dan -
