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How to configure C6748 SPI module to output periodic Chip Select signal?

Other Parts Discussed in Thread: ADS8326

Hi,

I am trying to interface ADS8326 using the SPI module in C6748. Previously when I was interfacing ADS8326 through McBSP module, I can configure McBSP to output a periodic CS (Frame Sync) signal with 24 SPI clocks active and 1 clock inactive, so I can receive the ADC data in a certain frequency. But now I don't seem to find a suitable SPI register to do such configuration. Do I need to manually trigger SPI transaction with an interrupt for each data sample transfer?

Thanks,
Jason

  • No expert on this. The C6748 SPI controller can handle up to 16-bits per word. It will output exactly one clock pulse for each bit. For anything over 16-bits, you would have to do more than one SPI transactions. You would have to manually control the CS before and after the SPI transactions. The CSHOLD field is used to override the automatic control of CS. This approach doesn't lend itself well to DMA. Maybe okay with IRQ.

    I've seen some undocumented behaviour of the SPI controller that could be used. Technically the CHARLEN field is defined to be 2 to 16 bits. I've found using a value larger than 16 will work. Only the last 16 bits are stored in the SPIBUF register. For the ADS8326, you could set CHARLEN to 5+1+16=22. This should result in 22 clocks. The last 16 clocks would get your 16-bit value. The caveat is that TI could "fix" this behaviour at any time.

  • Norman,

    I do see a 22 clocks after setting CHARLEN to 22. Thanks a lot. I am trying to check whether the received data is correct.

    Thanks,
    Jason