Mcspi fifo buffer address

Hello,

Please, check DM814x TRM, Chapters: 22.3 SPI Registers and 22.3.15 McSPI Channel (i) Transmit Register (MCSPI_TX(i)).

BR

Vladimir

Hi John,

The McSPI registers offsets are documented in the DM814x TRM. For example, the McSPI channel 0 FIFO transmit buffer register (MCSPI_TX0) is at offset 0x138.

The McSPI registers full addresses are documented in the DM814x Datasheet. For example, the McSPI channel 0 FIFO transmit buffer register (MCSPI_TX0) full address is 0x48030138 for McSPI0, 0x481A0138 for McSPI1, 0x481A2138 for McSPI2 and 0x481A4138 for McSPI3.

Regards,

Pavel