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About the DDR3 data bus order of AM335x design

Hi Sir,

I found the DDR3 data bus connected to the DDR3 chip is disordered on AM335x reference design(TMDSSK3358). Pls see below picture. Is that special design for AM335x? Should we follow its data bus order completely?

Cosmo

  • Hi Cosmo,
     
    No, don't worry. You can connect the data bus to the memory chip in the way that is most convenient on your layout. Just don't mix up the data bytes: bits D0...D7 should go to DQ0...DQ7 (can be swapped inside the byte) and  bits D8...D15 should go to DQ8...DQ15 (also can be swapped inside the byte).