I am tying the C6678's EMIF16 bus to a USB controller chip for data transfers between the DSP and the PC. I have working hardware and code, successfully transferring data.
My USB device needs to have a signal toggle with the last word of data whenever the data packet being sent is less than 512 bytes. To handle this, I have the following code segment (signal I need to toggle is on GPIO_0):
for (count = 0u; count < (len / 2) - 1; count++)
*usbIOptr = ptr [count];
gpRegs->BANK_REGISTERS [0].OUT_DATA &= ~0x01;
*usbIOptr = ptr [count];
gpRegs->BANK_REGISTERS [0].OUT_DATA |= 0x01;
My problem is that the loop seems to complete before the data is actually sent out the EMIF16 interface and my signal is toggling half way through. I'm guessing the EMIF16 interface has some sort of a FIFO that is being loaded by my loop, then sent out the actual interface underneath my code's nose. I need to be able to synchronize my signal toggle with the last word being sent out the interface.
I can't seem to find anything on the EMIF that suggests a "FIFO empty" type status flag. Is there a way to monitor the EMIF sub-system and know when it has completed the transfer?