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What should I do if I replace AR8031 with DP83848?



Hi,

We are using AM335x and DP83848. We port the u-boot from evm BSP. Now the problem is net interface doesn't work.

I ran "tftp 81000000 MLO" from u-boot command line. there was always timeout and retry. I found there was no ARP packet sent out.

What we have done:

change the pinmux, use beagle bone pin-mux. we have only 1 phy work with 100M.

change the MII_SEL register to 0x5. We use RMII.

change cpsw_data.gigabit_en = 0;

After this steps, I can't think out what else I should do. but the net interface kept not working. No ARP came out.

Then I noticed this structure:

static struct cpsw_slave_data cpsw_slaves[] = {                                         
        {                                                                               
                .slave_reg_ofs  = 0x208,                                                
                .sliver_reg_ofs = 0xd80,                                                
                .phy_id         = 0,                                                    
        },                                                                              
        {                                                                               
                .slave_reg_ofs  = 0x308,                                                
                .sliver_reg_ofs = 0xdc0,                                                
                .phy_id         = 1,                                                    
        },                                                                              
};                     

I wonder what a CPSW_slave is? what is its slave_reg_ofs? what's the phy_id stand for? I once thought maybe slave_reg_ofs need modify, but I don't know what it is, and I don't know what value it should be if it need change. Where this 0x208 and this 0x308 come from?

I find a topic when I was in despair. It says swap the phy_id value overcome the problem:

static struct cpsw_slave_data cpsw_slaves[] = {                                         
        {                                                                               
                .slave_reg_ofs  = 0x208,                                                
                .sliver_reg_ofs = 0xd80,                                                
                .phy_id         = 1,                                                    
        },                                                                              
        {                                                                               
                .slave_reg_ofs  = 0x308,                                                
                .sliver_reg_ofs = 0xdc0,                                                
                .phy_id         = 0,                                                    
        },                                                                              
};                     

I tried and to my surprise. the link is established. ARP sent and tftp work but a bit slowly. I'll try to use external ref_clock tomorrow.

Is there any one can explain all the questions above? Thanks in advance.

Best regards,

Lihua

  • Lihua,

    The DP83848 is put into MII Isolation Mode when configured with a PHY address of 0x00 via the PHYAD[n] pins. When in this mode, the device does not respond to packets on the TXD[0:3], and TX_EN inputs and presents a high impedance on several pins including RXD[0:3]. Please refer to section 2.3.1 of the DP83848 datasheet for more details on this mode.

    In your case, it appears the hardware is configured for PHY_ADDR = 0x01 via the PHYAD[n] pin map (Table 2 of DP83848 datasheet) so as to be in normal functional mode rather than MII Isolate mode. The default OS code expects the first PHY to be located at address 0x00 so you needed to change the code to reflect the fact that your first PHY is actually at address 0x01.

    I hope this helps explain what you are seeing.

  • Thank you very much, DK.

    I need some more probe to understand what you had said. Did you mean, the phy_id in that structure is actually PHYADDR of DP83848?

    Could anyone please explain that structure? what the meaning of the members? Thanks.

    Best regards,

    Lihua

  • Lihua,

    Yes. PHY_ID is the address at which the PHY can be found by system software. Typically PHY_ADDR is set at a board level by physically strapping the address pins of the PHY to the desired address. Since the DP83848 device uses address 0x00 for its MII Isolate mode, it has a weak internal pull-up on ADDR0 (COL) to ensure that the device comes up in a functional mode (0x01) rather than in MII Isolate mode.

    As I understand this code snippet, the function expects to find the first instance of a PHY at PHY_ADDR 0x00, but as we have seen in the case of the DP83848 device the first PHY_ADDR will always be 0x01 unless the MII Isolate mode is needed (in which case strapping ADDR0 would be required).

    I can't answer the remaining driver question; perhaps someone more knowledgeable in UBoot will chime in.