Hi all,
We are currently planning to use the C6678 in combination with an Altera FPGA. Both are connected via Hyperlink. The FPGA will have a flash-device attached, but we don't want to add a second flash for the DSP.
Now we are thinking about using Hyperlink-boot in the DSP. But in opposite to the mechanism implemented in the RBL we'd like to use "active"-, non host-mode. Thus, after initialization of the core and the Hyperlink-connection the DSP shall load an ELF-file - might be something else too - from a Hyperlink-region directly into his internal memory. The advantage of this approach is, that we could load a large linux-image directly into the attached ddr memory without having to use another bootloader stage.
Do you have any concerns regarding this mechanism?
Is there a way to achieve this?
Am I right that I cannot use and extend the IBL because it won't fit into the eeprom of the device (next to the RBL?), thus making it neccessary to attach a flash-device (which is what we don't want to do)?
Is there are way to modify the RBL? Especially considering that everthing is already either inside the RBL (Hyperlink-, and other initialization stuff) or inside the IBL (ELF-file parsing/loading). I already found out that TI want publish the source code of the RBL so it might be an option for TI to add a parameter (Bootloader-IOs) for the Hyperlink-boot to load an elf from a fixed address after getting a Hyperlink-IRQ and reading a magic-code on some hyperlink-address.
Looking forward to your suggestions.
Thanks
Andreas Oetken
