Problem about DM6467T when use CCS3.3 to Load Program to DDR2

ajax he

When I have changed the core chip from DM6467 to DM6467T，I can't load program in DDR2 by using CCSv3.3 (But load program to IRAM(only change the linker.cmd file) is successed)。

Trouble Reading Memory Block at 0x8082b1c0 on Page 0 of Length 0x4:
0xC0000824/-1034 @ marker 1024
Error during: Register, Execution, Timeout,

The memory access timed out because the dbus signals not ready

Abort Bus     -- aborts the current (hung) bus transaction
Force Bus     -- force the bus into a ready-state
Disconnect     -- disconnect the target so it can be reset
Retry Cmd     -- attempt the command again

There is also a very strange situation: sometimes I can Load Program successfully, but failed to Go Main。

When I have changed the core chip from DM6467 to DM6467T, I also do the handware changed.

1. Core Voltage (CVdd) need to be changed from 1.2V (DM6467) to 1.3V (DM6467T).

2. PLL0: 33.33MHz * 30 = 999MHz; PLL1: 33.33MHz * 24 = 799.9MHz (i.e. DDR2 speed: 792/2=399MHz)

Attachment is My arm gel file 1731.ajaxhe_davincihd1080p_arm.gel modified from http://support.spectrumdigital.com/boards/evmdm6467t/revc/

and my DDR2 chip is Samung K4T1G164QE-HC(L)F7

Thanks!

over 12 years ago

0 Renjith Thomas over 12 years ago

Guru 31670 points

Ajax,

First see whether you are running the GEL file before loading the program.

Once GEL file is loaded see whether you are able to do a memory read/write by manually verifying using memory window. If this doesn't work, please check the GEL for the DDR parameter's correctness.