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About the continue DDR3 address in IPNC8127

Genius 3400 points

hi all,

        In ipnc8127,   I using 512M(2pins of 256 DDR3) DDR3 in bank 0, and nodify  LISA MAP in uboot, I can access the DDR3 address, 0x80000000~0x9FFFFFF;  But when I start to kernel, I found it stop in the function of config_ti814x_ddr()(/drivers/dsp/syslink/omap_notify.c), because of  vpssm3_notify_va = 0xBFB00000, the ioremap is not successful.

       I track the notify_init() in the  omap_notify.c, at the start of  notify_init(),  the static variable evaluated to  0xBFB00000; 

      I had modified the config of   ipnc_mcfw/mcfw/src_bios6/cfg/ti814x/config_512M.bld 

var DDR3_ADDR_256_REG0_START = 0x80000000;
var DDR3_ADDR_256_REG0_END = 0x90000000;
var DDR3_ADDR_256_REG1_START = 0x90000000;
var DDR3_ADDR_256_REG1_END = 0xA0000000;

 where do it modify the  vpssm3_notify_va?   Thanks very much.

log:

 DRAM: 512 MiB
NAND: HW ECC BCH8 Selected
256 MiB
MMC: OMAP SD/MMC: 0, ON-BOARD SDIO: 1
   
Date: 2012-11-07 (Wednesday) Time: 18:00:00
Net: Detected MACID:0:1:2:3:4:5
cpsw
Hit any key to stop autoboot: 0
TI8148_IPNC#md 0x4e000040 4                   # LISA MAP  config
4e000040: 80500100 80500100 00000000 00000000 ..P...P.........
TI8148_IPNC#mw 0x9FFF0000 0x55AA55AA 0x100

TI8148_IPNC#md 0x9FFF0000 0x10
9fff0000: 55aa55aa 55aa55aa 55aa55aa 55aa55aa  
9fff0010: 55aa55aa 55aa55aa 55aa55aa 55aa55aa  
9fff0020: 55aa55aa 55aa55aa 55aa55aa 55aa55aa  
9fff0030: 55aa55aa 55aa55aa 55aa55aa 55aa55aa  

 

       

  • You have to change the kernel bootargs to change the vpssm3_notify address.Refer param notifyk.vpssm3_sva in kernel bootargs. However I dont think having continuous DDR address range from 0x8000_0000 to 0xA000_0000 will work. The reason for this is that some regions are expected to be non-cached on M3 . The AMMU page on M3 is 512 MB and makes addresses 0x8000_0000 to 0xA000_0000 cacheable and address 0xA000_0000 to 0xC000_0000 non-cacheable.So non-cacheable buffers should be placed in address range 0xA000_0000 to 0xC000_0000 .This was the reason for originally not having continuous 512M address range.

  • Thanks a lot. I have got it.