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Need help regarding a very strange behaviour on the c5535 eZDSP, involving the USB CDC example

Michael10327
Prodigy 200 points
Other Parts Discussed in Thread: TMS320C5535

Hi!

Using a Spectrum Digital TMS320c5535 eZdsp USB Kit and CCSv4, i was playing around with the USB CDC example (CSL_USB_CdcExample, CSL V2.5) and got it up and running quite fast and without problems.

But, after a while i noticed, that from a before project, the eZDSP boards hardware was setup to get its clock not from the RTC, but from the 12 Mhz source. Controlling the GEL, i saw the PLL being setup for use with the RTC clock. So i checked with an oscilloscope and yes, the dsp was heavily overclocked. I measured something about 160 to 180 Mhz with quite high jitter. But the CDC example ran anyway without a problem!

Now i setup the PLL correctly to 100 Mhz, but the CDC example refused to work at 100 Mhz!

I tried the setup of the PLL in various modes, via GEL and thru setup in software, always controlling with the oscilloscope to be sure about the correct frequency of 100 Mhz, but the result was strange: Windows recognizes the COM port (COM6) with the correctly setup values, but Hyperterminal does not connect to the COM port, complaining about wrong values.

Instead with the overclocked PLL everything works perfectly! Obviously i need some help - has anybody any ideas???

 

  • 0
    TI__Mastermind 30140 points

    Hi Michael,

    The C5535 eZdsp has a hardware configuration to select the clock input (CLKIN) as either from the 32.768 kHz oscillator or from the 12 MHz oscillator.

    The selection is made by setting DIP SW3 Pin 1 to ON for 12MHz oscillator, OFF for 32.768 kHz

    Try setting DIP SW3 pin 1 to ON and running SW that uses 12MHz source. The CLKOUT should not run faster than 100MHz for any C5535/4/3/2 device.

    Also check that the source code does not reconfigure the PLL (instead of just the GEL) - it may assume 12MHz CLKIN (i didnt check though).

    Hope this helps,
    Mark

  • 0 in reply to Mark M
    Prodigy 200 points

    Hi Mark,

    thanks for your advice. I already checked all this. I have tried all possible variations of

    • both combinations of DIP SW3 (pin CLK_SEL high and low),
    • PLL setup from GEL or from software,
    • PLL setup for RTC clock (32,768 khz) or CLKIN pin (12 Mhz)

    and had always the above described strange result - the overclocked versions work, the 100 Mhz versions do not!

    Know i´ve tried, setting USB to Fullspeed using USB_setFullSpeedMode(0x40)rigth after the USB_init call. That now works with 100 Mhz!

    For what i need full-speed is sufficient, so i consider the case closed for now. But anyway it would be worth it to investigate further - of course it should also work on high-speed! If you are interested, i can send you my source code.

    Thanks again,

    Michael

  • 0 in reply to Michael10327
    TI__Prodigy 225 points

    Hi Michael,

    We tried running the CSL CDC example on our side and found the same issue happening with some of our PCs. We have filed this as a bug and will investigate further.

    Regards,

    Rahul