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problem for GPMC connect ethernet and FPGA , FPGA can't read/write

Other Parts Discussed in Thread: OMAP3530

hardware: usrp-e110 (gumstix overo) , omap3530,  GPMC CS5 used by ethernet,  CS4 used by FPGA

software: ubuntu, the FPGA GPMC driver provide by ETTUS.  and during kernerl init file : board_overo.c , it setup these params into GPMC config:

// Set up CS4, data read/write

gpmc_cs_write_reg(4, GPMC_CS_CONFIG7, 0x0);  udelay(100);

// Signal control parameters per chip select

tmp = gpmc_cs_read_reg(4, GPMC_CS_CONFIG1);

tmp |= (GPMC_CONFIG1_WRITETYPE_SYNC); 

tmp |= (GPMC_CONFIG1_READTYPE_SYNC);  tmp |= (GPMC_CONFIG1_FCLK_DIV(2));

gpmc_cs_write_reg(4, GPMC_CS_CONFIG1, tmp); 

printk("GPMC_CONFIG1 reg: %x\n", tmp); #endif

.....................

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about config7 , it setup to 0x0, that mings forbidden the CS4 ??

during my work , under the file system /dev/, there has the usrp_e module ( FPGA interface module ). And it can opened in the application.  And the ethernet can always work . when I snaped the signal by FPGA chipscope , I found the CS5 sometimes low , sometimes high , but the CS4 always keep high.

when I modified the board_overo.c , setup the congfig7 to 0xf60, I found it will be error when kernel booting .

So, my question is how ethernet and FPGA can work at sametime ?   and how can I write the application ?

Thanks!!!!!!!

  • Hi Darren,

    Could you try to enable the GPMC CS5 and GPMC CS4 after booting by using readmem tool to set the GPMC_CS_CONFIG1 register with the configuration enabling both. I have not your hardware and I could not to reproduce the issue.

    BR

    Tsvetolin Shulev