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Complete (Minimal) Context Switch For 'C55x

Hello All,

I was wondering what the minimal context switch would be for the 'C55x family - here's the assembly listing from an example timer ISR that I have worked on:

;*******************************************************************************

;* INTERRUPT NAME: Timer_isr *
;* *
;* Function Uses Regs : AC0,AC0,AC1,AC1,AC2,AC2,AC3,AC3,T0,T1,AR0,AR1,AR2, *
;* AR3,AR4,SP,BKC,BK03,BK47,ST1,ST2,ST3,BRC0,RSA0,REA0, *
;* BRS1,BRC1,RSA1,REA1,CSR,RPTC,CDP,TRN0,TRN1,BSA01, *
;* BSA23,BSA45,BSA67,BSAC,CARRY,TC1,M40,SATA,SATD,RDM, *
;* FRCT,SMUL *
;* Save On Entry Regs : AC0,AC0,AC1,AC1,AC2,AC2,AC3,AC3,T0,T1,AR0,AR1,AR2, *
;* AR3,AR4,BKC,BK03,BK47,BRC0,RSA0,REA0,BRS1,BRC1,RSA1, *
;* REA1,CSR,RPTC,CDP,TRN0,TRN1,BSA01,BSA23,BSA45,BSA67, *
;* BSAC *
;*******************************************************************************
_Timer_isr:
.dwcfi cfa_offset, 3
.dwcfi save_reg_to_mem, 91, -3
AND #0xf91f, mmap(ST1_55)
OR #0x4100, mmap(ST1_55)
AND #0xfa00, mmap(ST2_55)
OR #0x8000, mmap(ST2_55)
PSH mmap(ST3_55)
.dwcfi cfa_offset, 4
.dwcfi save_reg_to_mem, 42, -4
PSH dbl(AC0)
.dwcfi cfa_offset, 5
.dwcfi save_reg_to_mem, 0, -5
.dwcfi cfa_offset, 6
.dwcfi save_reg_to_mem, 1, -6
PSH mmap(AC0G)
.dwcfi cfa_offset, 7
.dwcfi save_reg_to_mem, 2, -7
PSH dbl(AC1)
.dwcfi cfa_offset, 8
.dwcfi save_reg_to_mem, 3, -8
.dwcfi cfa_offset, 9
.dwcfi save_reg_to_mem, 4, -9
PSH mmap(AC1G)
.dwcfi cfa_offset, 10
.dwcfi save_reg_to_mem, 5, -10
PSH dbl(AC2)
.dwcfi cfa_offset, 11
.dwcfi save_reg_to_mem, 6, -11
.dwcfi cfa_offset, 12
.dwcfi save_reg_to_mem, 7, -12
PSH mmap(AC2G)
.dwcfi cfa_offset, 13
.dwcfi save_reg_to_mem, 8, -13
PSH dbl(AC3)
.dwcfi cfa_offset, 14
.dwcfi save_reg_to_mem, 9, -14
.dwcfi cfa_offset, 15
.dwcfi save_reg_to_mem, 10, -15
PSH mmap(AC3G)
.dwcfi cfa_offset, 16
.dwcfi save_reg_to_mem, 11, -16
PSH T0
.dwcfi cfa_offset, 17
.dwcfi save_reg_to_mem, 12, -17
PSH T1
.dwcfi cfa_offset, 18
.dwcfi save_reg_to_mem, 13, -18
PSHBOTH XAR0
.dwcfi cfa_offset, 19
.dwcfi save_reg_to_mem, 16, -19
PSHBOTH XAR1
.dwcfi cfa_offset, 20
.dwcfi save_reg_to_mem, 18, -20
PSHBOTH XAR2
.dwcfi cfa_offset, 21
.dwcfi save_reg_to_mem, 20, -21
PSHBOTH XAR3
.dwcfi cfa_offset, 22
.dwcfi save_reg_to_mem, 22, -22
PSHBOTH XAR4
.dwcfi cfa_offset, 23
.dwcfi save_reg_to_mem, 24, -23
PSH mmap(BKC)
.dwcfi cfa_offset, 24
.dwcfi save_reg_to_mem, 37, -24
PSH mmap(BK03)
.dwcfi cfa_offset, 25
.dwcfi save_reg_to_mem, 38, -25
PSH mmap(BK47)
.dwcfi cfa_offset, 26
.dwcfi save_reg_to_mem, 39, -26
PSH mmap(BRC0)
.dwcfi cfa_offset, 27
.dwcfi save_reg_to_mem, 47, -27
PSH mmap(RSA0L)
.dwcfi cfa_offset, 28
.dwcfi save_reg_to_mem, 48, -28
PSH mmap(RSA0H)
.dwcfi cfa_offset, 29
.dwcfi save_reg_to_mem, 49, -29
PSH mmap(REA0L)
.dwcfi cfa_offset, 30
.dwcfi save_reg_to_mem, 50, -30
PSH mmap(REA0H)
.dwcfi cfa_offset, 31
.dwcfi save_reg_to_mem, 51, -31
PSH mmap(BRS1)
.dwcfi cfa_offset, 32
.dwcfi save_reg_to_mem, 52, -32
PSH mmap(BRC1)
.dwcfi cfa_offset, 33
.dwcfi save_reg_to_mem, 53, -33
PSH mmap(RSA1L)
.dwcfi cfa_offset, 34
.dwcfi save_reg_to_mem, 54, -34
PSH mmap(RSA1H)
.dwcfi cfa_offset, 35
.dwcfi save_reg_to_mem, 55, -35
PSH mmap(REA1L)
.dwcfi cfa_offset, 36
.dwcfi save_reg_to_mem, 56, -36
PSH mmap(REA1H)
.dwcfi cfa_offset, 37
.dwcfi save_reg_to_mem, 57, -37
PSH mmap(CSR)
.dwcfi cfa_offset, 38
.dwcfi save_reg_to_mem, 58, -38
PSH mmap(RPTC)
.dwcfi cfa_offset, 39
.dwcfi save_reg_to_mem, 59, -39
PSHBOTH XCDP
.dwcfi cfa_offset, 40
.dwcfi save_reg_to_mem, 60, -40
PSH mmap(TRN0)
.dwcfi cfa_offset, 41
.dwcfi save_reg_to_mem, 62, -41
PSH mmap(TRN1)
.dwcfi cfa_offset, 42
.dwcfi save_reg_to_mem, 63, -42
PSH mmap(BSA01)
.dwcfi cfa_offset, 43
.dwcfi save_reg_to_mem, 64, -43
PSH mmap(BSA23)
.dwcfi cfa_offset, 44
.dwcfi save_reg_to_mem, 65, -44
PSH mmap(BSA45)
.dwcfi cfa_offset, 45
.dwcfi save_reg_to_mem, 66, -45
PSH mmap(BSA67)
.dwcfi cfa_offset, 46
.dwcfi save_reg_to_mem, 67, -46
PSH mmap(BSAC)
.dwcfi cfa_offset, 47
.dwcfi save_reg_to_mem, 68, -47
AMAR *SP(#0), XAR1
AND #0xfffe, mmap(SP)
PSH AR1
AADD #-1, SP
.dwcfi cfa_offset, 47
.dwpsn file "C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c",line 109,column 6,is_stmt
ADD #1, *(#_Timer0_Int_CTR) ; |109|
.dwpsn file "C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c",line 110,column 6,is_stmt
MOV #65535, AR2 ; |110|
MOV *(#_Timer0_Int_CTR), AR1 ; |110|
CMPU AR1 <= AR2, TC1 ; |110|
BCC $C$L1,TC1 ; |110|
; branchcc occurs ; |110|
.dwpsn file "C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c",line 111,column 7,is_stmt
MOV #0, *(#_Timer0_Int_CTR) ; |111|
$C$L1:
.dwpsn file "C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c",line 114,column 5,is_stmt
AND #0x0010, *(#1) ; |114|
.dwpsn file "C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c",line 122,column 5,is_stmt
BSET ST3_SMUL
BCLR ST3_SATA
$C$DW$16 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$16, DW_AT_low_pc(0x00)
.dwattr $C$DW$16, DW_AT_name("_vTickISR")
.dwattr $C$DW$16, DW_AT_TI_call
CALL #_vTickISR ; |122|
; call occurs [#_vTickISR] ; |122|
.dwpsn file "C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c",line 131,column 2,is_stmt
MOV #1, *port(#6166) ; |131|
.dwpsn file "C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c",line 134,column 2,is_stmt
OR #0x0001, *port(#7188) ; |134|
.dwpsn file "C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c",line 136,column 2,is_stmt
MOV #1, *(#_fTimer) ; |136|
.dwpsn file "C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c",line 163,column 1,is_stmt
AADD #1, SP
.dwcfi cfa_offset, 47
POP mmap(SP)
POP mmap(BSAC)
.dwcfi restore_reg, 68
.dwcfi cfa_offset, 46
POP mmap(BSA67)
.dwcfi restore_reg, 67
.dwcfi cfa_offset, 45
POP mmap(BSA45)
.dwcfi restore_reg, 66
.dwcfi cfa_offset, 44
POP mmap(BSA23)
.dwcfi restore_reg, 65
.dwcfi cfa_offset, 43
POP mmap(BSA01)
.dwcfi restore_reg, 64
.dwcfi cfa_offset, 42
POP mmap(TRN1)
.dwcfi restore_reg, 63
.dwcfi cfa_offset, 41
POP mmap(TRN0)
.dwcfi restore_reg, 62
.dwcfi cfa_offset, 40
POPBOTH XCDP
.dwcfi restore_reg, 60
.dwcfi cfa_offset, 39
POP mmap(RPTC)
.dwcfi restore_reg, 59
.dwcfi cfa_offset, 38
POP mmap(CSR)
.dwcfi restore_reg, 58
.dwcfi cfa_offset, 37
POP mmap(REA1H)
.dwcfi restore_reg, 57
.dwcfi cfa_offset, 36
POP mmap(REA1L)
.dwcfi restore_reg, 56
.dwcfi cfa_offset, 35
POP mmap(RSA1H)
.dwcfi restore_reg, 55
.dwcfi cfa_offset, 34
POP mmap(RSA1L)
.dwcfi restore_reg, 54
.dwcfi cfa_offset, 33
POP mmap(BRC1)
.dwcfi restore_reg, 53
.dwcfi cfa_offset, 32
POP mmap(BRS1)
.dwcfi restore_reg, 52
.dwcfi cfa_offset, 31
POP mmap(REA0H)
.dwcfi restore_reg, 51
.dwcfi cfa_offset, 30
POP mmap(REA0L)
.dwcfi restore_reg, 50
.dwcfi cfa_offset, 29
POP mmap(RSA0H)
.dwcfi restore_reg, 49
.dwcfi cfa_offset, 28
POP mmap(RSA0L)
.dwcfi restore_reg, 48
.dwcfi cfa_offset, 27
POP mmap(BRC0)
.dwcfi restore_reg, 47
.dwcfi cfa_offset, 26
POP mmap(BK47)
.dwcfi restore_reg, 39
.dwcfi cfa_offset, 25
POP mmap(BK03)
.dwcfi restore_reg, 38
.dwcfi cfa_offset, 24
POP mmap(BKC)
.dwcfi restore_reg, 37
.dwcfi cfa_offset, 23
POPBOTH XAR4
.dwcfi restore_reg, 24
.dwcfi cfa_offset, 22
POPBOTH XAR3
.dwcfi restore_reg, 22
.dwcfi cfa_offset, 21
POPBOTH XAR2
.dwcfi restore_reg, 20
.dwcfi cfa_offset, 20
POPBOTH XAR1
.dwcfi restore_reg, 18
.dwcfi cfa_offset, 19
POPBOTH XAR0
.dwcfi restore_reg, 16
.dwcfi cfa_offset, 18
POP T1
.dwcfi restore_reg, 13
.dwcfi cfa_offset, 17
POP T0
.dwcfi restore_reg, 12
.dwcfi cfa_offset, 16
POP mmap(AC3G)
.dwcfi restore_reg, 11
.dwcfi cfa_offset, 15
.dwcfi restore_reg, 10
.dwcfi cfa_offset, 14
POP dbl(AC3)
.dwcfi restore_reg, 9
.dwcfi cfa_offset, 13
POP mmap(AC2G)
.dwcfi restore_reg, 8
.dwcfi cfa_offset, 12
.dwcfi restore_reg, 7
.dwcfi cfa_offset, 11
POP dbl(AC2)
.dwcfi restore_reg, 6
.dwcfi cfa_offset, 10
POP mmap(AC1G)
.dwcfi restore_reg, 5
.dwcfi cfa_offset, 9
.dwcfi restore_reg, 4
.dwcfi cfa_offset, 8
POP dbl(AC1)
.dwcfi restore_reg, 3
.dwcfi cfa_offset, 7
POP mmap(AC0G)
.dwcfi restore_reg, 2
.dwcfi cfa_offset, 6
.dwcfi restore_reg, 1
.dwcfi cfa_offset, 5
POP dbl(AC0)
.dwcfi restore_reg, 0
.dwcfi cfa_offset, 4
POP mmap(ST3_55)
.dwcfi restore_reg, 43
.dwcfi cfa_offset, 3
$C$DW$17 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$17, DW_AT_low_pc(0x00)
.dwattr $C$DW$17, DW_AT_TI_return
RETI
; return occurs
.dwattr $C$DW$15, DW_AT_TI_end_file("C:/scratch1/c5535_eZdsp_xxxxRTOS_Demo/src/timer.c")
.dwattr $C$DW$15, DW_AT_TI_end_line(0xa3)
.dwattr $C$DW$15, DW_AT_TI_end_column(0x01)
.dwendentry
.dwendtag $C$DW$15

.sect ".text:retain"
.align 4

;**************************

So - is this a good example of a minimal context switch for the 'C55x?

Thanks!
John