Hi all.
Our target is customized C6678 board and it runs in big endian.
In SPI Boot mode. our program in Core 0 start and configure PCIe as root complex.
And mapped peripheral registers to PCIe for Inbound Access from endpoint.
Now, we can access to almost all dsp peripheral registers from my endpoint device.
And Magic Addr(RBL) and execute code for CoreN can be written from PCIe
Next, we want make interrupt RBL in coreN to release halt to start my program in CoreN.
But I cant UnlockKick and can't write to IPCGRx to initiate IPC interrupt to CoreN,
from PCIe endpoint.
From core0, I can initiate IPC interrupt to CoreN to release halt RBL.
my Question is
- PCIe Inbound access can write KICK0 , KICK1 and IPCGRx?
thankyou.
