cache writeback to different memory location

RCReddy

Hi Ti Folks,

Just got a doubt. lets say i have a buffer which is in MSMCSRAM or DDR3, i did invalidated it..in the sense i got a copy of it in the L1D cache. while writing back, can i specify different memory location rather than the same

here is what i wanted: -

cache invalidation: - address 0xaaaaaaaa to lenth L

do some operations on the contents starting from address 0xaaaaaaaa to lenth L

writeback: - here i want to specify it to write back to different location say 0xbbbbbbbb [plz note i dont want it to writeback to parent location]. Is it possible that way? Let me know on it.

Thanks

RC Reddy

over 13 years ago

0 HRi over 13 years ago

Guru 10750 points

Hi RC,

You can define the base address (L1DWBAR) and the length (L1DWWC) there is no destination address,

BR,

0 Alberto Chessa over 13 years ago

Mastermind 6670 points

Hi,

It is not possible to force the cache to write back to a diffferent address and you cannot be sure some cache lines are not writeback during your elaboration.

If you want to use the cache as a fast buffer, maybe you can considered to temporary disable it and manually copy your data in, using it as L1 memory.

0 RCReddy over 13 years ago in reply to Alberto Chessa

Genius 3575 points

Hi Albert,

In other words, can i assume user CANNOT access/use IDMA since it mainly used between L1 memory and L2 memory

IDMA – 2 CHs of “Internal” DMA (Periph Cfg, Xfr L1 ↔ L2)

Can you please eloborate on this IDMA and its usage in L1 and L2. what happens in case of L1 <-> L3 memories. is it handled by IDMA ?

Thanks

RC Reddy

0 HRi over 13 years ago in reply to RCReddy

Guru 10750 points

Hi RC,

You can use the IDMA to transfer data between the core L1 and the core L2 for that you need to configure part of your L1 as RAM,

BR,

0 RCReddy over 13 years ago in reply to HRi

Genius 3575 points

Hi HRi,

Thanks for your reply. Any more idea on this "what happens in case of L1 <-> L3 memories. is it handled by IDMA ?"

Thanks

RC Reddy

0 HRi over 13 years ago in reply to RCReddy

Guru 10750 points

Hi RC Reddy,

The IDMA is local to the CorePac which means that it can move data within the CorePac only (L1P, L1D, L2 and CFG),

BR,

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cache writeback to different memory location