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How to unmap the event n to channel Qx?



Hi Factory,

    According to the EDMA3UnmapChToEvtQ(), the way to unmap the event n to Channel Qx, is to write 1 to the 3rd bit of the En to 1.

   But according to the Table 11-31. DMA Channel Queue n Number Registers (DMAQNUMn) Field Descriptions: the 3rd bit is described as below:

Reserved. Always write 0 to this bit; writes of 1 to this bit are not supported and attempts to do so may
result in undefined behavior.

  So is the way in the EDMA3UnmapChToEvtQ() correct or not?

  Could you help to confirm it ?

Thanks!

Yaoming

  • Hi Yaoming,

    To unmap the event n to channel Qx, all the bits in the field "En" corresponding to that event has to be cleared.

    Current implementation of the API “EDMA3UnmapChToEvtQ ()” is having an issue. This API is unmapping the requested event correctly by clearing the En bits, but it is also setting all the remaining bits as 1, including reserved bits. This will be taken care in the next release.

    Please revert back if you have any comments.

    Regards,

    M.Jyothi Kiran

  • Hi M.Jyothi Kiran,


      Thanks for your reply!


      It is great the function will be improved in the next release.


      And could you give more details on how to clear the En bits?

       Do you mean setting the reserved bit to 1?

    Yaoming

    Thanks!

  • Hi Yaoming,

    Please refer the register description of DMA Channel Queue n Number Registers (DMAQNUMn). In this register each “En” filed is having 3 bits.

    In order to unmap event, we have to clear all these 3 bits in the En filed, corresponding to the event. No need to set 1 to the reserved bit.

    The macro “EDMA3CC_DMAQNUM_CLR(chNum)” is used to clear the “En” field bits. This macro is used inside the API “EDMA3UnmapChToEvtQ()”.

    Please refer the definition of this macro to get the idea on clearing the “En” filed bits. This macro definition can be found in the file “include/edma.h”

    Please revert back if you have any comments.

    Thanks and Regards,

    M.Jyothi Kiran

  • Hi M.Jyothi Kiran,

      Sorry, I don't quite catch your point.

     1.  here channel is configured as 1 for an example.

       Then the value for EDMA3CC_DMAQNUM_CLR(1) is 0xFFFF FF8F, When it operates(|) with DMAQNUM0, it will set the reserve bit

       Correct me if I am wrong..

      2. In another way, if 3 bits in En field are cleared to 0, then it will be queued in Q0, do you mean that queued to Q0 means unmapping?

       Could you help to clarify my points?


    Yaoming,

    Thanks!



  • Hi Yaoming,

    Please find the below comments:

    1. For your example the value for EDMA3CC_DMAQNUM_CLR(1) will be 0x7777 7707. Here the API is having an issue, it will clear the event bits corresponding to the En, and also it will set all the other bits to 1 including reserved bits.

    The below highlighted line in the API “EDMA3UnmapChToEvtQ()” , is having an issue

    if (EDMA3_CHANNEL_TYPE_DMA == chType)

        {

            /* Unmap DMA Channel to Event Queue                                */

            HWREG(baseAdd + EDMA3CC_DMAQNUM((chNum) >> 3u)) |=

                              EDMA3CC_DMAQNUM_CLR(chNum);

        }

    The correct implementation should be as below

    if (EDMA3_CHANNEL_TYPE_DMA == chType)

        {

            /* Unmap DMA Channel to Event Queue                                */

            HWREG(baseAdd + EDMA3CC_DMAQNUM((chNum) >> 3u)) &=

                              EDMA3CC_DMAQNUM_CLR(chNum);

        }

     

    2.  Yes. If we clear the bits corresponding bits to the Event, it will be Queued in Q0.  As per TRM, “At reset, all channels point to event queue 0.” .  So during unmapping we are configuring the default value.

    Please revert back with your comments.

     

    Regards,

    M.Jyothi Kiran