MCBSP duplicated data on DX pin

#include "main.h"
#include "evmc6748.h"
#include "mcbsp.h"
#include <ti/pspiom/cslr/cslr_mcbsp.h>

/*-------PINMUX-------*/
#define PINMUX_MCBSP1_Tx_REG       (1)
#define PINMUX_MCBSP1_Tx_MASK      (0x0F0F0F00)
#define PINMUX_MCBSP1_Tx_VAL       (0x02020200)

extern uint8_t txbuf2[5];

uint32_t MCBSP_init(McbspRegs *mcbsp, uint8_t CLKGDV, uint8_t FPER, uint8_t FWID, uint8_t XWDLEN1, uint8_t xferlen)
	{
	uint32_t rtn = ERR_INVALID_PARAMETER;
	uint8_t i;
	if (mcbsp == MCBSP1)
	{
		EVMC6748_lpscTransition(PSC1, DOMAIN0, LPSC_MCBSP1, PSC_ENABLE);
		EVMC6748_pinmuxConfig(PINMUX_MCBSP1_Tx_REG, PINMUX_MCBSP1_Tx_MASK,PINMUX_MCBSP1_Tx_VAL);
	}

//reset mcbsp registers
	mcbsp->SPCR=CSL_FMKT(MCBSP_SPCR_FREE,DISABLE)
				| CSL_FMKT(MCBSP_SPCR_SOFT,DISABLE)
				| CSL_FMKT(MCBSP_SPCR_FRST,RESET)
				| CSL_FMKT(MCBSP_SPCR_GRST,RESET)
				| CSL_FMKT(MCBSP_SPCR_XINTM,FRM)
				| CSL_FMKT(MCBSP_SPCR_XRST,DISABLE)
				| CSL_FMKT(MCBSP_SPCR_DLB,DISABLE)
				| CSL_FMKT(MCBSP_SPCR_RJUST,RZF)
				| CSL_FMKT(MCBSP_SPCR_CLKSTP,DISABLE_00)
				| CSL_FMKT(MCBSP_SPCR_DXENA,OFF)
				| CSL_FMKT(MCBSP_SPCR_RINTM,RRDY)
				| CSL_FMKT(MCBSP_SPCR_RRST,DISABLE); //hold Tx and Rx parts in reset

	mcbsp->XCR=CSL_FMKT(MCBSP_XCR_XFIG,NO)
				|CSL_FMKT(MCBSP_XCR_XPHASE,SINGLE_FRM)
				|CSL_FMKT(MCBSP_XCR_XDATDLY,1BIT);

	switch (XWDLEN1) {
		case 8:
			CSL_FINST(mcbsp->XCR,MCBSP_XCR_XWDLEN1,8BIT);
	//		SETBIT(mcbsp->XCR, XCR_XWDLEN1_8bit);
			break;
		case 12:
			CSL_FINST(mcbsp->XCR,MCBSP_XCR_XWDLEN1,12BIT);
	//		SETBIT(mcbsp->XCR, XCR_XWDLEN1_12bit);
			break;
		case 16:
			CSL_FINST(mcbsp->XCR,MCBSP_XCR_XWDLEN1,16BIT);
	//		SETBIT(mcbsp->XCR, XCR_XWDLEN1_16bit);
			break;
		case 20:
			CSL_FINST(mcbsp->XCR,MCBSP_XCR_XWDLEN1,20BIT);
	//		SETBIT(mcbsp->XCR, XCR_XWDLEN1_20bit);
			break;
		case 24:
			CSL_FINST(mcbsp->XCR,MCBSP_XCR_XWDLEN1,24BIT);
	//		SETBIT(mcbsp->XCR, XCR_XWDLEN1_24bit);
			break;
		case 32:
			CSL_FINST(mcbsp->XCR,MCBSP_XCR_XWDLEN1,32BIT);
	//		SETBIT(mcbsp->XCR, XCR_XWDLEN1_32bit);
			break;
		}
	CSL_FINS(mcbsp->XCR,MCBSP_XCR_XFRLEN1,xferlen-1);

	//PROGRAM SAMPLE RATE GENERATOR
		mcbsp->SRGR=  CSL_FMKT(MCBSP_SRGR_GSYNC,FREE)
					| CSL_FMKT(MCBSP_SRGR_CLKSP,RISING)
					| CSL_FMKT(MCBSP_SRGR_CLKSM,INTERNAL)
					| CSL_FMKT(MCBSP_SRGR_FSGM,FSG)
					| CSL_FMK(MCBSP_SRGR_CLKGDV, CLKGDV-1)
					| CSL_FMK(MCBSP_SRGR_FPER, FPER-1)
					| CSL_FMK(MCBSP_SRGR_FWID, FWID-1);
		//PCR
	mcbsp->PCR 	= 0;
	mcbsp->PCR=	  CSL_FMKT(MCBSP_PCR_FSXP,ACTIVELOW)
					| CSL_FMKT(MCBSP_PCR_FSXM,INTERNAL)
					| CSL_FMKT(MCBSP_PCR_CLKXM,OUTPUT);

	mcbsp->MCR 	= 0;
	mcbsp->RCERE0 = 0;
	mcbsp->RCERE1 = 0;
	mcbsp->RCERE2 = 0;
	mcbsp->RCERE3 = 0;
	mcbsp->XCERE0 = 0;
	mcbsp->XCERE1 = 0;
	mcbsp->XCERE2 = 0;
	mcbsp->XCERE3 = 0;

	for (i = 0; i < 3; i++) { ; }
	// enable bit clk generator
	CSL_FINST(mcbsp->SPCR,MCBSP_SPCR_GRST,CLKG);
	// enable bit clk generator

	for (i = 0; i <=0 ; i++) { ;} // wait for GRST
	CSL_FINST(mcbsp->SPCR,MCBSP_SPCR_XRST,ENABLE);	// take Tx portion out of reset

	for (i = 0; i < 1; i++) { ; } //wait to check Transmit synchronization error
	if	(CSL_FEXT(mcbsp->SPCR, MCBSP_SPCR_XSYNCERR) == CSL_MCBSP_SPCR_XSYNCERR_YES) // if XSYNCERR occured
		CSL_FINST(mcbsp->SPCR,MCBSP_SPCR_XRST,DISABLE);//// disable transmitter to clear the error

//setup_EDMA();// setup EDMA transfer

	if (CSL_FEXT(mcbsp->SPCR, MCBSP_SPCR_XRST) == CSL_MCBSP_SPCR_XRST_DISABLE)
		CSL_FINST(mcbsp->SPCR,MCBSP_SPCR_XRST,ENABLE); // enable transmitter if it was reset by XSYNCERR

//mcbsp->DXR=0x0;//send a dummy byte
while (CSL_FEXT(mcbsp->SPCR, MCBSP_SPCR_XRDY) != CSL_MCBSP_SPCR_XRDY_YES) {;} //wait for XEMPTY

CSL_FINST(mcbsp->SPCR,MCBSP_SPCR_FRST,FSG);	// enable frame sync generator

//EdmaEnableChannel(MCBSP1_TX_PARAM,EDMAQNUM_0);// Enable Channel 5 Event and Assign it to Queue 0
//mcbsp->MCR|= 1<<16;
mcbsp->DXR=0x0;//send a dummy byte

	return (rtn);

}

uint32_t MCBSP_write(McbspRegs *mcbsp, uint8_t *src_buffer, int16_t in_length) {
	uint32_t rtn = ERR_INVALID_PARAMETER;
	uint32_t i;
	uint32_t mcbsp_DXR;

	if ((mcbsp != NULL) && (src_buffer != NULL))
	{
//      mcbsp_DXR = mcbsp->DXR;

		// transmit data one byte at a time, copy receive data into input buffer.
		for (i = 0; i < in_length; i++)
		{
//          while (CHKBIT (mcbsp->SPCR,MCBSP_SPCR_XEMPTY)){ ;}

			mcbsp_DXR=*src_buffer;
			src_buffer++;
			while (CSL_FEXT(mcbsp->SPCR, MCBSP_SPCR_XRDY) != CSL_MCBSP_SPCR_XRDY_YES)
			{;}
			         // copy the tmp reg to the real thing.
			mcbsp->DXR = mcbsp_DXR;

		}

		rtn = ERR_NO_ERROR;
	}

	return (rtn);
}