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memset implementation in C64x+ devices

Abhishek Singh Sisodia
Intellectual 535 points

Hi

The memset function on TI C64x+ core refer to a library call (RTS lib). I would like to know if the library has optimized implementaion of the function? What if the buffers are word align and we have to transfer modulo 2 number of bytes? In such case we expect it to transfer word by word optimally.

Please let me know if the implementation in library is optimized or not. If not then can i get the optimized implementation or the current implementaion in lib so i can make an optimized routine.

 

Thanks

Abhishek

 

  • 0
    TI__Guru* 84110 points

    Abhishek,

    The Run Time Support library is probably best supported in the TI C Compiler Forum, where they might know the answer immediately. I suspect it is an optimized implementation, but I know that it is fully compatible with any valid arguments. So if you question is whether it is too optimized to work with non-aligned buffers, the answer is "no".

    The source is supplied with the RTS library, so you can look at the C and in some cases assembly implementation.

    What I always do to find out an answer like this is to load a simple test program into the simulator that calls the function, memset, then run to that function call and do an assembly step-into to reach the code in the disassembly window. You could also just type the label into the Disassembly Window address bar in CCS.

    If you do not want to look at assembly, then run the program with timer (TSCL) checks on either side and see if it runs as fast as you would like. If it does, then the optimization question may be moot; if it does not, then this could be a good place for digging into the optimization or seeking alternatives. For memset in L1D SRAM and L2 SRAM, you could use the IDMA1 feature. See the Megamodule User Guide for more information on IDMA1.

    Regards,
    RandyP