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C6745 Dead JTAG Clock Issue

jintao liu1
Prodigy 80 points

Dear Everyone:

 I meet an issue in C6745 platform . My simulater is SEED-XDS560V2 with 14pin connector  JTAG port .

When I connect my simulator to my device( C6745 platform ) , an error ccourred . Please see following picture :

  

 

 2. Then I checked my device board , its power level seems no problem. And Its power on sequence is below:

    a>   1.2V power on--->3.3V/1.8V power on ------> Reset signal for DSP ( reset signal after 3.3v power at least 50ms) .

    b>    20MHz external clock  input to DSP befor Reset signal at least 1ms

 PS my sch :

 

 

Currently , I don't  know whether there is  hardware issue or missing or some software operating issue .

Is there someone has met the same  issue ?  who can give me some suggestion to debug . 

Thanks and BR !

 

Jintao

 

 

  • 0
    TI__Guru* 84110 points

    Jintao,

    First, confirm that there is a valid JTAG clock signal on the JTAG_TCK pin of the JTAG header when your emulator is connected.

    Second, if the DSP does not supply an RTCK signal (I do not think it does), then you may need to connect the JTAG_TCK pin to the JTAG_RTCK pin on the JTAG header.

    If this does not help, you may want to check with SEED about any special issues with their emulator. I doubt there are any issues like this, but they will be another good resource. Their documentation may tell you how the RTCK pin should be used, if it is not described in a TI emulation document.

    Regards,
    RandyP

  • 0 in reply to RandyP
    Prodigy 80 points

    Dear RandyP:

    Thank you for your  reply !

     I have fixed this issue by connecting RTCK to TCK pin.  Connecting test is already PASS .

    But I met a new issue during next steps , error information is as bellowing:

          C674X_0 Error connecting to the target Connect to PRSC failed .

    I have checked JTAG singals quality .

    1. TCK and RTCK clock wave is no problem.

    2. TDI & TDO  signals and wave seems perfect .

    3. JTAG 3.3V power is OK .

     4. EMU0&EMU1  external pull high or floating  has no effect to this issue.  

     

    Is there any other  point of hardware should be checked ?

    And I don't know whether it has relationship with GEL file correcting ?

    Do you have any suggestion ?

    Thanks & BR !

    jintao

     

     

     

     

     

  • 0 in reply to jintao liu1
    TI__Guru* 84110 points

    Jintao,

    Please mark either your post above, or the one above it, with the Verify Answer button so we will know this thread is answered.

    Thank you for posting a new thread for the new question above. For other people searching this, the new question above is being addressed in a new thread here.

    Regards,
    RandyP