In our DSP system, a DSP(TMS320C6203BGNZA-250) and FPGA(XC2V1000-4I) are used.The XBUS of DSP is connected to FPGA, and 20K pull-up/pull-down resistors are used for the configuration of DSP. the main Configurations are: XCE0 and XCE1 are asynchorous I/O, XCE2 and XCE3 are synchorous FIFO,HMOD=0(asynchorous Host Port),XRAB=1(Bus arbiter is enabled), Sometimes,when we power-on the system,the -XWE signal of XBUS is not normally high level,but low level at all times ,no change if when manual-reset. If DSP read XCEn I/O or memory,a positive pulse(seem as inverting of XOE or XRE) be found on -XWE. The result in this situation we can not write any data to asynchorous I/O XCE0 or XCE1! If we give a pulse to XCLKIN pin(no connection,only pull-up!),for example,use a probe of Oscillgrah trigger this pin, The XWE can convert to normal state:high level,and then we can write data to XCE0 or XCE1.By the way, all signals about Host Port of XBUS are pull-up or pull-down,that is the Host port of XBUS is disabled.