Wer cannot get the 180 fps full HD on DM8168 as claimed

Can you share the Vsys_printDetailedStatistics() logs. Also pls check enabling tiler improves performance.

Tiler should be enabled in

/dvr_rdk/mcfw/src_linux/mcfw_api/usecases/multich_vdec_vdis.c

Set

tilerEnable = TRUE

Hi,

When I set the tilerEnable=True, the program was hanging in there. The following are the Vsys_printDetailedStatistics() logs()

The totalAcq2acqDelay :30 % .This indicates data is not being fed to mcfw in timely fashion. This may be due to delay in file read time of 1080P stream. Is your file on network or local storage ? Also can you try changing

/dvr_rdk/demos/mcfw_api_demos/mcfw_demo/demo_vdec_vdis_bits_rd.c

VdecVdis_bitsRdSendFxn()

{

    OSA_waitMsecs(MCFW_IPCBITS_SENDFXN_PERIOD_MS);

    to

    OSA_waitMsecs(8);

}

and check if there is any performance improvement

Hi,

We have already set  

#define VDEC_VDIS_FRAME_DURATION_MS ( 8 )

OSA_waitMsecs(6);  

in 6 channels of 1080P30 performance test. The testing file is on local storage NFS developing environment. I think the delay in my print out you mentioned is caused by the terminal print out. Apparently, the original frame rate  for each channel is 30, 25, 25, 30, 25, 25 fps. After enable the print out, the frame rate down to 20, 16, 16, 20, 16,16fps per each channel. Is there other thing we could check?

There is very less chance that terminal print is causing delay. It looks like you are not feeding data fast enough . Are you setting the frame timestamp fed to the mcfw by any chance. Try with local storage (SATA) and check if there is any improvement.Pls share the elementary .h264 stream if possible and we will try it on our local setup to confirm it is not performance issue.

Hi,

We have done the test again and we fount that indeed Vsys_printDetailedStatistics() delayed the decode and display. Hopefully, since we make the call every 30 seconds and for the every first time, the print out is accurate without the delay. I repost the print out again as follows. We also share the .h264 test file here https://docs.google.com/open?id=0B0699GGnR-MpNWFDaTBPVzJtdjQ.

Hi,

Any update?

We tried the stream in our setup and we are able to get full FPS.Pls try out the below changes and let us know under what condition you get full fps:

1. Set displayDelay = 2

2. Set decoder numBufsPerCh = 8

  -- Above two should be set in the ini file if you are using the vdec_vdis mcfw demo.

3. Disable avsync in

/dvr_rdk/mcfw/src_linux/mcfw_api/usecases/multich_vdec_vdis.c

mulich_vdec_vdis_set_avsync_vidque_prm()

if ((queCfg->chNum >= avsStartChNum)
        &&
        (queCfg->chNum <= avsEndChNum)
        &&
        (gVsysModuleContext.vsysConfig.enableAVsync))
    {
        queCfg->avsyncEnable = FALSE;
    }
    else
    {
        queCfg->avsyncEnable = FALSE;
    }

4. Set number of scalers as one per three windows:

/dvr_rdk/mcfw/src_linux/mcfw_api/usecases/multich_vdec_vdis.c

Void MultiCh_createVdecVdis()

 -- Change

    swMsPrm[0].swMsInstStartWin[0]  = 0;
    swMsPrm[0].swMsInstStartWin[1]  = 4;

to

    swMsPrm[0].swMsInstStartWin[0]  = 0;
    swMsPrm[0].swMsInstStartWin[1]  = 3;

5. Try with 1x1 window layout.

6. Feed data from local storage SATA instead of from NFS.

Based on which step gives full fps we can debug further on why we dont get full fps on your setup.

mulich_vdec_vdis_set_avsync_vidque_prm

Hi,

The following are the testing result:

The original frame rate for 6 channels are 31.7750, 25.6417, 25.8083, 31.9750, 25.6250, 25.8000

The results applied your recommendation from 1 to 5:

Can you share the multich_vdec_vdis.c in your codebase. I want to make changes to enable tiler and get it working. I want to check if issue is with input data feeding rate or due to DDR b/w.Tiler usage will reduce DDR b/w

Hi,

The file is here

https://docs.google.com/open?id=0B0699GGnR-MpemRUSWhEV1RoMm8

 I noticed that the DDR of the Z3 board is 1300 other than 1600. I am not sure is that the problem or not.

Thanks!

DDR should be set for 796 Mhz.Full performance cannot be reached at lower frequency. Can you pls share the log after correcting the DDR frequency

Hi,

We have found where the problem is. The DDR on the board we got from z3 is 1333 MHz. Therefore the DDR frequency is set to 675. That's why we could not get the full power. 

Thanks!