DM8148 DDR3-1600 Rev K

We use same chip MT41J128M16JT-125 IT:K without any problem. I used default DDR configurations in RDK2.8.

I suggest checking your PCB first. Try another board.

Hi,

Thank you for your response.  This is great help.   We are also running 16-bit memory.  Would you be able to tell me your Clock/Data Lengths used on your board?  That is the values you input into the DDR3 Init routine for write leveling training? 

Currently we are working with the following design topology

Trace Length (inches)                
                     Byte 0    Byte 1    Byte 2    Byte 3
CK trace       1.8       1.8          2.5         2.5
DQS trace    1.8       1.53        1.33      1.21

#define    PHY_GATELVL_INIT_CS0_DEFINE        0x0
#define    PHY_WRLVL_INIT_CS0_DEFINE        0x0

#define    PHY_GATELVL_INIT_CS1_DEFINE        0x0
#define    PHY_WRLVL_INIT_CS1_DEFINE        0x0
#define    PHY_CTRL_SLAVE_RATIO_CS1_DEFINE        0x80

#define DDR3_EMIF_READ_LATENCY        0x00173209
#define DDR3_EMIF_TIM1            0x0AAAD4DB
#define DDR3_EMIF_TIM2            0x682F7FDA
#define DDR3_EMIF_TIM3            0x501F82BF
#define DDR3_EMIF_REF_CTRL        0x00000C30
#define DDR3_EMIF_SDRAM_CONFIG        0x61C011B2
#define DDR3_EMIF_SDRAM_ZQCR        0x50074BE1

Hi,

Thanks for the help.  Further Debug and testing has confirmed that we are able to close on timing and boot our board using a DDR frequency of 533Mhz, and reads work at 333Mhz but booting untested.  For some reason the 400Mhz passes write leveling but memory reads not working.  We further have been reading that there are references to similar cases where our memory chip has encountered problems.  For your info the chip we are using is the 1.35V variant of the DDR3-1600 from Micron.  And we are able to run at 1.35V at 533Mhz.  So the board is good.

I am going to investigate further what really is going on with the parameters that we are not configuring.  But basically it looks like there is some parameter that is not being set right on the read timing.

Just wanted to update the forum on our fix.  We use devices MT41J128M16JT-125 IT:K  at 1.35V with DM8148.

TIM3 Register contains T_RFC, which for 2GB devices, should be increased accordingly to the default values in the evaluation board and default gel file (evaluation board uses 1GB devices).  For some reason older silicon could accept lower than spec numbers on T_RFC.  Increase to a value of 64, minimum based on 160ns spec a 2.5ns clock period, write/read level testing and booting is now working.

If your using Rev K silicon, watch out of this.

Hallo Stephen
Are you using LPDDR3? are you working with 1.35V as your DDR and DM voltage? what is your working frequency? did you checked it also in high and low temperature conditions?
Thanks
Asaf