Vlpb custom image processing.dm8168

Pavel Goryunov

Hello everyone.

I wonder how to add any custom video frame processing using VLPB component?

From what point to start?

By the way, i use TI EZSDK 5.04 and CAPTURE->DEI->VLPB->DISPLAY omx chain and catch "OMX_ErrorInsufficientResources". I read an articles related to this problem and understood that migarating to TI EZSDK 5.05 should help. Is that true?

over 12 years ago

0 Pavel Goryunov over 12 years ago

Intellectual 435 points

Anyone, please.

0 Gabi Gvili over 12 years ago in reply to Pavel Goryunov

Genius 4120 points

Read this and follow instructions

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/144078.aspx

It is working also for EZSDK 5.04

0 Margarita Gashova over 12 years ago in reply to Gabi Gvili

TI__Guru* 80190 points

Hello,

OMX_ErrorInsufficientResources:

You can run sys_top utility to see if it is running out of resources. Also loggerSM would give us more details. For one channel probably it is not running out of memory.

http://processors.wiki.ti.com/index.php/OMX_Viewing_Media_Controller_Traces

Best Regards,

Margarita

0 Pavel Goryunov over 12 years ago in reply to Margarita Gashova

Intellectual 435 points

Read this and follow instructions

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/144078.aspx

Margarita Gashova said:

. Also loggerSM would give us more details. For one channel probably it is not running out of memory.

Ok. I've done all insructions. I found out that problem in DEI component not in VLPB. Thank you.

Here is log from loggerSMDump : 5556.smDump log.zip

It seems DEI cant move to idle state due to OMX_ErrorInsufficientResources. Any Ideas?

0 Gabi Gvili over 12 years ago in reply to Pavel Goryunov

Genius 4120 points

I still think that the problem is in VLPB. I suggest you follow Archits instructions very carefully then rebuild (run make omx_clean and then run make omx).
If after doing the above you still have the same problem, Please answer the following questions:
How did you build your OMX chain? capture->dei->vlpb->display, capture->vlpb->dei->disply or something else?
What are your OMX buffers size? 1080p, 720p, or other?
How many buffers do you use per OMX component input/output?

0 Pavel Goryunov over 12 years ago in reply to Gabi Gvili

Intellectual 435 points

Hi, Gabi.

I verified changes once again. Here is my memsegdef_default.c file:

Fullscreen 4848.memsegdef_default.c Download

/*
 *  Copyright (c) 2010-2011, Texas Instruments Incorporated
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *  
 *  *  Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  
 *  *  Redistributions in binary form must reproduce the above copyright
 *     notice, this list of conditions and the following disclaimer in the
 *     documentation and/or other materials provided with the distribution.
 *  
 *  *  Neither the name of Texas Instruments Incorporated nor the names of
 *     its contributors may be used to endorse or promote products derived
 *     from this software without specific prior written permission.
 *  
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 *  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 *  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 *  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 *  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 *  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 *  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *  Contact information for paper mail:
 *  Texas Instruments
 *  Post Office Box 655303
 *  Dallas, Texas 75265
 *  Contact information: 
 *  http://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm?
 *  DCMP=TIHomeTracking&HQS=Other+OT+home_d_contact
 *  ============================================================================
 *  
 */

/** 
 *  @file   memsegdef.c
 *
 *  @brief  Memory map segment definitions, This is auto generated file
 *
 *
 *
 *  @ver    0.1
 *  
 *  ============================================================================
 */
/*----------------------------- Memory Segment configuration -----------------*/
#include <ldr_memseg.h>

uint32_t ldrmemcfg_ddrSize = LDR_DDR_SIZE_1G ;

LDR_MemSeg sdk_memseg_default[] =
{
  /* Segment 0 */
  {
   1,                           /* valid */
   "IPC_SR_VIDEO_M3_VPSS_M3",    /* name */
   0x00100000,                  /* size */
   LDR_SEGMENT_TYPE_DYNAMIC_SHARED_HEAP,  /* LDR_SEGMENT_TYPE_DYNAMIC_SHARED_HEAP,
                                   seg_type */
   0,                           /* flags */
   0x9A100000,                  /* system_addr */
   0x9A100000,                  /* slave_virtual_addr */
   LDR_CORE_ID_VM3,             /* master_core_id */
   ((1 << LDR_CORE_ID_VM3) | (1 << LDR_CORE_ID_DM3) | (1 << LDR_CORE_ID_A8) | (1 << LDR_CORE_ID_DSP)),
   /* core_id_mask */
   ((1 << LDR_CORE_ID_VM3) | (1 << LDR_CORE_ID_DM3) | (1 << LDR_CORE_ID_DSP)),
   /* cache_enable_mask */
   ((1 << LDR_CORE_ID_VM3) | (1 << LDR_CORE_ID_DM3) | (1 << LDR_CORE_ID_DSP)),                           /* cache_operation_mask */
   1                            /* shared_region_id */
  },

  /* Segment 1 , Temporarily used by VFPC internal buff heap */
  {
   1,                           /* valid */
   "VPSS_M3_INT_HEAP_CACHED",     /* name */
   0x01B00000,                  /* size */
   LDR_SEGMENT_TYPE_DYNAMIC_LOCAL_HEAP,        /* seg_type */
   0,                           /* flags */
   0x9A200000,                  /* system_addr */
   0x9A200000,                  /* slave_virtual_addr */
   -1,                          /* master_core_id */
   (1 << LDR_CORE_ID_DM3),      /* core_id_mask */
   0,                           /* cache_enable_mask */
   0,                           /* cache_operation_mask */
   -1                           /* shared_region_id */
  },

  /* Segment 2 , Temporarily used by VFPC internal buff heap */
  {
   1,                           /* valid */
   "VIDEO_M3_INT_HEAP_CACHED",  /* name */
   0x01800000,                  /* size */
   LDR_SEGMENT_TYPE_DYNAMIC_LOCAL_HEAP,        /* seg_type */
   0,                           /* flags */
   0x9BD00000,                  /* system_addr */
   0x9BD00000,                  /* slave_virtual_addr */
   -1,                          /* master_core_id */
   (1 << LDR_CORE_ID_VM3),      /* core_id_mask */
   1,                           /* cache_enable_mask */
   0,                           /* cache_operation_mask */
   -1                           /* shared_region_id */
  },

  /* Segment 3 */
  {
   1,                           /* valid */
   "IPC_SR_FRAME_BUFFERS",      /* name */
   0x0BC00000,                  /* size */
   LDR_SEGMENT_TYPE_DYNAMIC_SHARED_HEAP,        /* seg_type */
   0,                           /* flags */
   0xB3D00000,                  /* system_addr */
   0xB3D00000,                  /* slave_virtual_addr */
   1,                           /* master_core_id */
   (1 << LDR_CORE_ID_VM3) | (1 << LDR_CORE_ID_DM3) | (1 << LDR_CORE_ID_A8) | (1 << LDR_CORE_ID_DSP),
   /* core_id_mask */
   (1 << LDR_CORE_ID_VM3) | (1 << LDR_CORE_ID_DM3) | (1 << LDR_CORE_ID_DSP),     /* cache_enable_mask */
   (1 << LDR_CORE_ID_VM3) | (1 << LDR_CORE_ID_DM3) | (1 << LDR_CORE_ID_DSP),     /* cache_operation_mask 
                                                         */
   2                            /* shared_region_id */
  },

  /* Segment 4 */
  {
   1,                           /* valid */
   "DSP_ALG_HEAP",              /* name */
   0x01400000,                  /* size */
   LDR_SEGMENT_TYPE_DYNAMIC_LOCAL_HEAP,        /* seg_type */
   0,                           /* flags */
   0x98000000,                  /* system_addr */
   0x98000000,                  /* slave_virtual_addr */
   LDR_CORE_ID_DSP,             /* master_core_id */
   (1 << LDR_CORE_ID_DSP),      /* core_id_mask */
   (1 << LDR_CORE_ID_DSP),      /* cache_enable_mask */
   (1 << LDR_CORE_ID_DSP),      /* cache_operation_mask */
   -1                           /* shared_region_id */
  },

  {
   1,                           /* valid */
   "A8_DSP_CMEM",               /* name */
   0x1400000,                   /* 20MB-size */
   LDR_SEGMENT_TYPE_CMEM,       /* seg_type */
   0,                           /* flags */
   0x96C00000,                  /* system_addr */
   0x96C00000,                  /* slave_virtual_addr */
   LDR_CORE_ID_A8,             /* master_core_id */
   (1 << LDR_CORE_ID_A8) | (1 << LDR_CORE_ID_DSP),      /* core_id_mask */
   (1 << LDR_CORE_ID_A8) | (1 << LDR_CORE_ID_DSP),      /* cache_enable_mask */
   (1 << LDR_CORE_ID_A8) | (1 << LDR_CORE_ID_DSP),      /* cache_operation_mask */
   -1                           /* shared_region_id */
  },
   /* Last Segment, Marked by valid flag to 0 */
  {
   0,
  },
};

/* End Of File */

Then i changed app_cfg.h file in my project, pasted omxbase_cfg.oe674. After that i made "make clean"->"make all" from ezsdk root. But the problem still remains.

Then i tried to follow advice with CCS connection to DSP and here i meet some problem. Here is the sequence of my actions:

Start CCS, create new config file(dm8168evm+XDS100v2), start debug process, load gel file from spectrumdigital.com
bring A8 to suspend state
Bring DSP to suspend state
load symbols from new DSP binary to DSP(Here i dont see anything in "variables" and "expression")
load c6xtest to A8. Here i meet such error (Trouble Reading Register CP15_CONTROL_REGISTER: (Error -2131 @ 0x20013F00) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.0.872.0) )

What i do wrong?

Thanks. Pavel.

0 Gabi Gvili over 12 years ago in reply to Pavel Goryunov

Genius 4120 points

You also should run make media-controller-utils_clean, make media-controller-utils and make media-controller-utils_install. Make sure that you see the new firmware_loader in your targetfs directory.

0 Pavel Goryunov over 12 years ago in reply to Gabi Gvili

Intellectual 435 points

Gabi Gvili said:

You also should run make media-controller-utils_clean, make media-controller-utils and make media-controller-utils_install. Make sure that you see the new firmware_loader in your targetfs directory.

That is done. Problem still remains.

0 Gabi Gvili over 12 years ago in reply to Pavel Goryunov

Genius 4120 points

OK,
I want to check if your VLPB is allocating its buffers into shared region 2.
Take the example C6xtest, run it as it was delivered from TI and see if it is working OK, if it is working OK, increase the buffer size IL_CLIENT_VLPB_BUFFER_SIZE in C6xtest/src/ilclient_utils.h to 4147200 and see if the example can allocate this size of buffer.

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Vlpb custom image processing.dm8168