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Monitoring Smartreflex output in TMDSEVM6678L

Allan Law
Intellectual 340 points
Other Parts Discussed in Thread: UCD9222, UCD7242, LM10011, TMS320C6678, LM21215A

Hi,

I am tasked to monitor and measure how the CVDD voltage varies in the C6678 Eval board under various operating loads.

I understand that the output of CVDD is controlled by SmartReflex. The UCD9222 receives the VID input from the C66 and outputs the corresponding PWM to the UCD7242. The range given was 0.9 to 1.1V. From the various forums posts and the user guides, I understand that each C667x die will have different voltage requirements that are determined during the manufacturing process.

What I am interested in measuring from the C6678 Evaluation Board will be the fluctuations of the voltage required by the C6678 during startup and under various computational load.

I measured the voltage across TP18 and ground with an oscilloscope. From this, I found out that the voltage remained constant at about 0.95V.
However, when ran some FFT algorithms or did some continuous data transfer using Ethernet, PCIe, DDR3, etc, the CVDD voltage remained the same.

Hence, it will be nice if someone can clarify these doubts I have about SmartReflex

  1. Am I able to measure the voltage as describe? I would like to monitor the VID1 output to the UCD9222 but there does not appear to be a way to do this in the evaluation board.
  2. When will the voltage requirement of the C6678 CVDD change? I cannot seem to find the information as to the conditions in which the CVDD voltage will change. Section 5.9.3 of SPRABI2A, describes Class-0 and Class-3 operations. However, it did not describe the conditions that CVDD will change under Class-3 operation.
  3. How would I be able to run my C6678 at only Class-0 operation so that it will not vary the voltage required? I understand from many forum post that the smartreflex is required. However, I need to report on the feasibility of running the C6678 CVDD at a fixed voltage so that we can use a power solution that takes up less space than the recommended UCD9222 & UCD7242 solution as this configuration needs to use large capacitors.
  4. This forum post,
    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/207704.aspx
    mentioned about some C6678 dies having the SmartReflex disabled.
    a.    Is this something that the user can do? If not, then how do we determine if the SmartReflex is disabled in our badge of C6678 purchased.
    b.    For the mentioned case in the post, is he able to enable the SmartReflex?
    c.    Which line in the memory window range 0x02620000 – 0x02620023 shows that the SmartReflex is disable? I would like to check that information out on my evaluation  board as well.
After reading the various posts and TI documents, I am still unsure on the exact working of the SmartReflex other than it saves power and it is needed. These extra information will be vital for my understanding.
Regards,
Allan
  • 0
    Prodigy 200 points

    Hi,

    This is an interesting post. We have the similar questions.

    We hope that someone (from TI) can answer soon.

    Thank you!

  • 0
    TI__Mastermind 42545 points

    Hi Allan,

    I'll address your questions below.

    1. Am I able to measure the voltage as describe? I would like to monitor the VID1 output to the UCD9222but there does not appear to be a way to do this in the evaluation board.  <The VCNTL interface is used to provide the VID value to the UCD9222.  While there are no test points for this interface it does use a voltage translator, U19 on the C6678 EVM. You could probe either the pins on the voltage translation or the pull up resistors as monitor points.>
    2. When will the voltage requirement of the C6678 CVDD change? I cannot seem to find the information as to the conditions in which the CVDD voltage will change. Section 5.9.3 of SPRABI2A, describes Class-0 and Class-3 operations. However, it did not describe the conditions that CVDD will change under Class-3 operation. <Currently the C6678 is only supporting Class-0.  The voltage will only adjust one time after the part is removed from the power up reset state.  That value is programmed into the part during the manufacturing process and could be different for each device.>
    3. How would I be able to run my C6678 at only Class-0 operation so that it will not vary the voltage required? I understand from many forum post that the smartreflex is required. However, I need to report on the feasibility of running the C6678 CVDD at a fixed voltage so that we can use a power solution that takes up less space than the recommended UCD9222 & UCD7242solution as this configuration needs to use large capacitors. <While Class-0 implies that the part will operate at one voltage level it does not guarantee that the voltage level will be the same for all C6678 parts.  You still need a power supply that will adjust the voltage level to the value requested using the VCNTL interface.  Currently the digital power supply controller design using the UCD9222 and the analog power supply controller implemented with the LM10011 are the only two power supply designs supported.>
    4. This forum post,
      http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/207704.aspx
      mentioned about some C6678 dies having the SmartReflex disabled.
      a.    Is this something that the user can do? If not, then how do we determine if the SmartReflex is disabled in our badge of C6678 purchased.
      b.    For the mentioned case in the post, is he able to enable the SmartReflex?
      c.    Which line in the memory window range 0x02620000 – 0x02620023 shows that the SmartReflex is disable? I would like to check that information out on my evaluation  board as well. <The parts mentioned in the post you referenced were a subset that were incorrectly programmed during test.  You should contact you FAE to get more information on how to identify these parts and what to do with them.  The initial core voltage level for the C6678 is 1.1V and these parts will not change that value. Consequently they will operate but will not meet the power performance identified in the power consumption spreadsheet.  They may require more current from the power supply and more cooling.>

    Regards, Bill

     

  • 0 in reply to Bill Taboada
    Intellectual 340 points

    Hi Bill,

    Thanks for your reply =)

    I hope I can counter check my understanding with the points stated in my post:

    1. I will probe those pins and get the corresponding voltage requirements that the C6678 is requesting. Thanks.
    2. <Currently the C6678 is only supporting Class-0.  The voltage will only adjust one time after the part is removed from the power up reset state.  That value is programmed into the part during the manufacturing process and could be different for each device.> When you mention that the C6678 is only supporting Class-0, does that mean that all the C6678 that are in production right now, the TMS versions, only supports Class-0 operation? If that is the case, then all of the C6678 that are currently in the market cannot dynamically adjust its CVDD voltage requirements according to its load? Each TMS320C6678 DSP that I will purchase will only operate at one fixed voltage that has been programmed in during the manufacturing process? For example, if I probe the VCNTL interface find out that the copy of TMS320C6678 that I am currently using requires 960mV,  then that voltage requirement will not change throughout its lifetime? If that is the case, then I can do that for each copy of the TMS320C6678 that I install on my modules?
    3. <While Class-0 implies that the part will operate at one voltage level it does not guarantee that the voltage level will be the same for all C6678 parts.  You still need a power supply that will adjust the voltage level to the value requested using the VCNTL interface.  Currently the digital power supply controller design using theUCD9222 and the analog power supply controller implemented with the LM10011 are the only two power supply designs supported.> With relation to point 2, if I can power up my C6678 on my board and read the VCNTL values, I can then tweak the CVDD values to match what is required by the DSP? For example, when I power up the board for the first time, I can give the C6678 1.0V for CVDD and then read the VCNTL interface, If I found out that it requires more or lesser voltage, I can then tweak my CVDD power supply to match that requirement? Hence, the CVDD that I tweak will now match the requirements by VCNTL and will always provide that constant voltage. What will be the drawback of this as compared to the usage of the SmartReflex power solution? This arrangement assumes that the C6678 operates at Class-0 as mentioned.
    4. I will check with my TI field engineer. Thanks.
    If the C6678 only operates on Class-0, meaning that it will only operate at a fixed voltage stipulated by the VCNTL interface, then can I assume that the current benefits of using the SmartReflex power solution is that I do not have to tweak my CVDD supply to match the VCNTL interface requirements?
    When will the C6678 support Class-3 operation? My initial thought was that the SmartReflex solution saves power by dynamically adjusting its voltage according to the current load on the DSP. How then can I activate the Class-3 operation? Will it be a software implementation or will I have to purchase a new set of DSPs with Class-3 in built in them?
    Thanks for your feedback. I currently have one design that utilizes a fixed voltage and I need to be fully aware of what the consequences are.
    Regards,
    Allan
     
  • 0 in reply to Allan Law
    TI__Mastermind 42545 points

    Hi Allan,

    2) All current TMS parts for the C6678 are class-0 and will not dynamically change the voltage based on the current load. That value will not change over time either.  If you are asking if the power supply for CVDD could be individually tuned to each part rather then using the smart reflex power supply the answer is yes as long as the power supply provided the requested voltage level with the tolerance specified in the data manual.  That tolerance should include the value of the DC offset from the requested voltage and the AC ripple on the supply.  However, setting each CVDD power supply by hand sounds like a difficult solution to the problem.

    3) You should power the part initially with 1.1V.  As you suggested you can then tweek the CVDD value to get the voltage you need.  What method were you going to use to tweek the voltage?  Using something like an adjustable pot won't give you the precision you need and the stability across temperature to achieve the required tolerances.  If you need a supply solution for a single C6678 I urge you to look into the LM10011 solution.  The LM10011 will set the voltage initially to 1.1V and then 'tweek' the voltage using the feedback of an analog power supply to the achieve the required CVDD voltage without any intervention.  It's designed to achieve the tolerances needed for the C6678.

    Based on current testing we have not seen enough of a power savings using class-3 to enable it for the C6678 at this time.  There is no schedule at this point on the addition of class-3 operation.  Note that we're discussing the power savings above and beyond that achieved with the present class-0 smart reflex.  Class-0 operation does not imply that all C6678 DSPs can operate with a single fixed voltage level.  The level requested by the the VCNTL pins must be provided to the part for proper operation.  A C6678 which is provided with a CVDD outside of the tolerance of requested voltage are not guaranteed to operate correctly and are not limited to the power requirements specified in the power consumption model. 

    Regards, Bill

  • 0 in reply to Bill Taboada
    Intellectual 340 points

    Hi Bill,

    Your clarification about the Class-3 helps to explain why I am seeing a constant voltage when I measure CVDD.

    2) The power regulators I am using is the LTM4608 regulator. It requires a resistor to specify the output voltage. After I have identified the correct voltage to supply the C6678 DSP,  I will then choose a resistor value that will give the closest Vout to the required output voltage as required from the VCNTL. Setting each CVDD by hand sounds like it will not be feasible if my product were to be produced in larger quantities. I will have to consider that. Thanks!

    3) Just for a clarification, as mentioned in point (2), the DSP will not vary its voltage over time. Does this apply for start up as well? Although I can power up the DSP with 1.1V before reading the VCNTL or adjusting the CVDD power supply, does the DSP require 1.1V momentarily during start up?
    I will consider your suggested LM10011 solution. The LM10011 controls the voltage output of the LM21215A-1 due to the feedback given by the LM10011. However, is this part only designed to work with the LM21215A-1 or other TI regulators? Or can it work with other regulators which is adjusted with a resistor across the feedback pin as well? I will have to consider if it will work with my LTM4608 regulator.

    As mentioned in the previous post, I measured the VCNTL(3:0) pins while my Eval Board was running. I measured an output of "1100". I measured the CVDD output to be about 950mV. However, Table 12 from the Hardware Design Guide gives the VCNTL readings as 6 bits while the column label is VCNTL(3:0). The closest I can find is "10 1100b" but it states 988mV. I would like to find out how I would convert my 4 bit readings to the 6 bit mappings as stated in the table. The datasheet of the LM10011 device appears to have 4bit and 6bit operation but I am still unsure about how the 4bit VCNTL gets mapped to a 6bit voltage control.

    Thanks for your clarifications Bill. These information does help me have a better understanding of my design.

    Regards,
    Allan 

  • 0 in reply to Allan Law
    TI__Mastermind 46460 points

    Allan,

    The LM10011 operated with any analog power converter that has a resistor divider feedback loop.  The LM21215A is just an example.

    The 4 VCNTL lines are used to transmit a 6-bit VID code.  Please see the Data Manual and the Hardware Design Guide.  VCNTL[3] is a strobe signal to indicate the proper sampling time.  You must capture the VCNTL[2:0] values on the falling and subsequant rising edges of the of this strobe to capture the SR-O VID value.  This will occur soon after reset release.

    Tom