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uPP EOW Interrupts

I have built up an application based on the sample code that came with the uPP Driver when I installed it.  The application has been modified to do two 16 bit receives. I get the first of set interrupts (one interrupt for I and one interrupt for Q), but don't anymore interrupts after that.  I reload the descriptors in the callback.  Below is a code snippet from my EOW interrupt callback:

    if (upp_isr_bit == CSL_UPP_UPISR_EOWI_MASK)

    {

                        //bufferIndexA++;

        if ((upp_reg_ptr->UPIS2 & CSL_UPP_UPIS2_PEND_MASK) == 0)

        {

            bufferIndexA++;

            upp_xfer_a.windowAddr = &upp_buffer_a_16[bufferIndexA][0];

            GIO_read(upph, &upp_xfer_a, NULL);

        }

        eowIFlag = 1;

    }

 

    if (upp_isr_bit == CSL_UPP_UPISR_EOWQ_MASK)

    {

                        //bufferIndexB++;

        if ((upp_reg_ptr->UPQS2 & CSL_UPP_UPQS2_PEND_MASK) == 0)

        {

            bufferIndexB++;

            upp_xfer_b.windowAddr = &upp_buffer_b_16[bufferIndexB][0];

            GIO_read(upph, &upp_xfer_b, NULL);

        }

            eowQFlag = 1;

    }

  • John,

    Which device and board are you using?

    Does the UPP require you to clear a status bit to re-enable the I & Q interrupts?

    Regards,
    RandyP

  • My apologies, I should have supplied that information in the first Email.  I am using an OMAP138 with a C674X DSP.  I am trying to control the uPP from the DSP.  I can get one transfer to go but no more after that.  When I pause the processor and check the ISR there are not bits set indicating that the interface has not received any more transfers and/or it it not longer enabled.  I created this application from an example that was doing a loop back.  I am wondering if I have the interface in the wrong mode.  I going to check the control register this morning.

    Thanks for the help.