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Hyperlink protocal question

My customer is evaluating C6678 for data crunching in a motor contorl application.  They are interested in hyperlink but have concerns about it being a closed proprietary protocol.  They strongly prefer open standards like PCIe so they can have the source for the IP and enough technical detail where they can independently implement/debug/fit it. 

1. Are we willing to open our hyperlink protocal for my customer?

2. Is there any demo using PCIe between 667x and any xilinx FPGA?

Thanks

  • Marcus,

    For the PCIe question, on the C667x side, we have PCIe LLD example in MCSDK/PDK package (C:\ti\pdk_C667x_xxx\packages\ti\drv\exampleProjects\PCIE_exampleProject).

    It provides the configuration examples for both RC and EP modes.

    But I am not aware that we have PCIe example for Xilinx FPGA from TI. The customer might find the example from Xilinx or the FPGA PCIe IP provider.

    Ideally our PCIe LLD example should work with other FPGA, which has been configured properly. And the customer can always modify the PCIe configuration based on their applications. .