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DM814X MMC CLOCK Register set

Aska
Intellectual 740 points

Hi,

                Could you help to confirm how can set mmc0 clock register to 48MHz?

                  Due to the document SPRS647C, Table 8-86 in page 336 write the fop (CLK) = 48MHz and see the documents "SPRUGZ8C," page 455 Figure 2-8 to point out          

                 MMC_CLK from sysclk8 = 192MHz ,thanks.

  • 0
    TI__Guru**** 170625 points

    Hi Aska,

    You can decrease the sysclk8 clock frequency with changing the default DPLL_USB settings.

    But note that the MMC0 functional clock should be 192MHz (the default one), see DM814x TRM, chapter 18 MMC/SD, Figure 18-1.

    Regards,

    Pavel


  • 0 in reply to Pavel Botev
    TI__Guru**** 170625 points

    You can also divide the 192MHz clock inside the MMC controller, before going out on the pin to the MMC card, from register:

    SD System Control Register (MMCHS_SYSCTL) [15:6] CLKD

    Best Regards,

    Pavel

  • 0 in reply to Pavel Botev
    Intellectual 740 points

    Hi Pavel,

                         Thanks for reply.

                          The Register (MMCHS_SYSCTL) [15:6] CLKD can be clock frequency select. but only bypass or /2 or /3 and /1023 items.

                          If using 48MHz frequency, 192MHz / 4 can be just equal to 48MHz, but not this items, see SPRUGZ8C page 2330 the Table 18-34, could you help to confirm                      

                           thanks.


  • 0 in reply to Aska
    TI__Guru**** 170625 points

    Hi Aska,

    I agree that it is not clearly documented, but [15:6] CLKD can be programmed to every value between 0x0 and 0x3FF, thus you can program the value of 0x4. Thus you will divide the 192MHz input clock to /4 before going out on the pin.

    Regards,

    Pavel