Hi folks,
Just to complete my set of questions over the last couple of days, I have some questions about discrete sync configuration:
1. Is there any documentation available that indicates the timing of the different waveforms that are acceptable to the DM8148 on the Data Enable pin when discrete sync is enabled? In particular, I am interested in the SC_DISCRETESYNC_ACTVID_VBLK waveform.
2. Is there any documentation available that describes the different behaviour for each of the bit fields in the VIP control word register?
Thanks in advance,
Regards,
Terry