This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Interfacing RS485 transceiver with AM335x

Hi,

I want to interface RS485 transceiver with AM335x processor. I want to use UART3 for this purpose. I have doubt regarding trasmit Direction Enable (DE) signal connection for RS485 transceiver to AM335x. From AM335x reference manual, UART_RTSn may not be connected to DE pin of RS485 transceiver since its functionality is different.

Kindly suggest where DE signal of RS485 transceiver is to be connected and how can I make DE signal active only during data transmission from TXD pin. Can I use any GPIO for this purpose? Will it be possible to control DE signal during data transmission from UART TXD pin through WinCE or linux Kernel since GPIO and UART modules are different?

Awaiting for your reply at an earliest.

Regards,

Mitesh

 

 

  

  • Hi,

    Awaiting for your reply at an earliest.

    Regards,

    Mitesh

     

     

  • Hi Mitesh,
     
    You can control direction through a GPIO. I don't know much about software, but you will need to modify the transmit part of the driver in order to do this.Can you tell me exactly what transceiver you intend to use? It may be possible to connect it ina way that doesn't need program control of direction.
  • If you are interested, we put together a driver patch for driving an RS-485 transceiver for the AM-3359 to support the MityARM-3359 processor SOM.

    A description of the application code, traces of the performance and links to kernel patches can be found on this link.

    -Mike

  • Hi Mike,

    Thanks for your reply. Hope this will resolve our problem.

    Regards,

    Mitesh

     

     

  • Hi Biser,

    Thanks for reply.

    Regards,

    Mitesh

     

  • Hi,

    Thank you for your patch and I've adapted your patch for the Kernel 3.8 for the BeagleBone Black .

    But now, I've a problem, when I'm sending data with the call of the function write, I can see that the data is sent in two blocks !

    http://i.stack.imgur.com/N8beT.jpg

    most of the time, it works, but i don't why, when i'm running a special sequence, the driver choose to cut in half the frame ......

  • Maybe it's my configuration of the serial port that is not correct :

    	handler = open( hPort->acAddress, O_RDWR | O_NOCTTY | O_NDELAY );
    	if(!handler){
    		iStatus=MICKA_STATUS_ERROR_OPEN;
    		return MICKA_STATUS_OK;
    	}else{
    		rs485conf.flags = SER_RS485_ENABLED;
    		rs485conf.flags |= SER_RS485_USE_GPIO;
    	}
    
    	rs485conf.gpio_pin = 32;	
    	rs485conf.delay_rts_before_send = 0;
    	rs485conf.delay_rts_after_send = 0;
    	
    
    	if(rs485conf.delay_rts_after_send<0 || iStatus!=MICKA_STATUS_OK){
    		iStatus=MICKA_STATUS_ERROR_PARAMETER;
    		return MICKA_STATUS_OK;
    	}else{
    		rv = ioctl (handler, TIOCSRS485, &rs485conf);
    		if (rv) {
    			iStatus=MICKA_STATUS_ERROR_SYSTEM;
    			return MICKA_STATUS_OK;
    		}
    	}
    
    	if ( tcgetattr ( handler , & mode ) >= 0 && iStatus==MICKA_STATUS_OK) {
    		mode . c_cflag &= ( ~ CBAUD )  ;
    		//mode . c_cflag |= atoi(token) ;
    
    		mode.c_cflag |=B38400;
    		
    
    		// 8N1 :
    		mode . c_cflag &= ( ~ CSIZE )  ; mode . c_cflag |= CS8 ;
    		mode . c_cflag &= ( ~ PARENB ) ;
    
    
    		mode . c_cflag &= ( ~ CRTSCTS ) ;
    		/*
    		  raw same as -ignbrk -brkint -ignpar -parmrk -inpck -istrip -inlcr -igncr -icrnl -ixon -ixoff -iuclc -ixany -imaxbel -opost -isig -icanon -xcase min 1 $
    		 */
    		mode . c_iflag |=     IGNBRK   ;
    		mode . c_iflag |=     IGNPAR   ;
    		mode . c_iflag &= ( ~ INLCR  ) ;
    		mode . c_iflag &= ( ~ ICRNL  ) ;
    		mode . c_iflag &= ( ~ IXON   ) ;
    		mode . c_iflag &= ( ~ IXOFF  ) ;
    		mode . c_oflag &= ( ~ ONLCR  ) ;
    		mode . c_oflag &= ( ~ OCRNL  ) ;
    		mode . c_lflag &= ( ~ ISIG   ) ;
    		mode . c_lflag &= ( ~ ICANON ) ;
    		mode . c_lflag &= ( ~ ECHO   ) ;
    		rv=tcsetattr ( handler , 0 /* no special action */ , & mode );
    		if(rv){
    			return MICKA_STATUS_OK;
    		}
    		ioctl ( handler , FIONBIO , & ser1half ) ;
    	}else {
    		iStatus=MICKA_STATUS_ERROR_SYSTEM;
    		return MICKA_STATUS_OK;
    	}

  • How long is your transmit sequence?  I am wondering if you are exceeding the driver FIFO/buffer depth....

    -Mike

  • no more than 23 bytes.

    I'm repeating this sequence :

    02 00 10 03 00 00 02 00 bb aa 55 00 08 00 01 09 00 00 01 00 00 6e 24

    and I'm increasing the byte 15, and changing of course the CRc :

    02 00 10 03 00 00 02 00 bb aa 55 00 08 00 01 00 00 00 01 00 00 26 c6

    ....

    02 00 10 03 00 00 02 00 bb aa 55 00 08 00 01 09 00 00 01 00 00 6e 24

    It doesn't make sense for me ....

  • In the beginning, it works, but when I'm going to the 9 frame, I got the problems....

  • Problem Solved !

    By disabling the preempt mode in the kernel config .... I have some fopen call in my program which is not a good idea in real time application ....
    Thx everyone for the help !
  • Hi all,

    As per above discussion i could under stand that , after transmit holding register empty , the driver will wait for a fixed time and reassert direction control pin. does that work for wide variety of baud rates from 300bps to 115200bps ? For different baud rates,time taken for transmitting 1 byte will be different . After Transmit holding register , there is 16byte FIFO and shift register .THRE interrupt only indicates that transmit holding register empty   and not whole frame physically transmitted .Am i correct ? So what will be the final solution for the same ? 

    Thanks and regards 

    Gokul CG[gokul.g@kalkitech.in]

  • Hi all,

    As per above discussion i could under stand that , after transmit holding register empty , the driver will wait for a fixed time and reassert direction control pin. does that work for wide variety of baud rates from 300bps to 115200bps ? For different baud rates,time taken for transmitting 1 byte will be different . After Transmit holding register , there is 16byte FIFO and shift register .THRE interrupt only indicates that transmit holding register empty and not whole frame physically transmitted .Am i correct ? So what will be the final solution for the same ?

    Thanks and regards

    Gokul CG[gokul.g@kalkitech.in]
  • Has there been any improvement since above message? I'm working on am335x based board currently having linux-ti-stating 3.14 kernel. It seems that at least omap-serial.c has now got ioctl hooks for TIOCSRS485 and TIOCGRS485 there. Anyhow they return error code -1 while calling whereas omap-serial should return -EFAULT or -ENOIOCTLCMD ( -14 or -515). So, do anyone how to configure omap-serial in use for am335x based board (from menuconfig for example) or is this just a silly thought? I just figured out that there could be some reason for Mike to patch also omap-serial.h and omap-serial.h. Now I believe that serial lines are taken care of 8250_omap.c (drive for internal core).
    Thanks,
    Matti