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Programming FPGA using sitara AM3892

akshay bharadwaj
Prodigy 250 points
Other Parts Discussed in Thread: AM3892

Hi.

1.I want to program the FPGA through the ARM processor, where ARM is the master. The FPGA configuration data is in a flash connected to the ARM. I am planning to connect the AM3892 processor through GPMC to the dedicated pins of the FPGA. Will it work ? Or are there any dedicated lines to program the FPGA? In one of the existing designs, the ADSP from analog devices is connected to the FPGA using GPIO pins. So, should i use GPIO pins or can i use GPMC lines? 

2. How to program the Flash using the ARM processor

Regards 

Akshay S Bharadwaj

  • 0
    TI__Guru**** 170625 points

    Hi Akshay,

    1. Yes, FPGA can be connected to AM389x device through the GPMC interface. Here is what we have in the AM389x device DataSheet (SPRS681E)

    General Purpose Memory Controller (GPMC)
    – Flexible Asynchronous Protocol Control for Interface to FPGA, CPLD, ASICs, etc.

    8.8 General-Purpose Memory Controller (GPMC) and Error Locator Module (ELM)

    The GPMC is a device memory controller used to provide a glueless interface to external memory devices such as NOR Flash, NAND Flash (with BCH and Hamming Error Code Detection for 8-bit or 16-bit NAND Flash), SRAM, and Pseudo-SRAM. It includes flexible asynchronous protocol control for interface to SRAM-like memories and custom logic (FPGA, CPLD, ASICs, etc.).

    2. For how to program the Flash (NAND, NOR, SPI), check here:

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_U-Boot#U-Boot_NAND_Support

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_U-Boot#U-Boot_NOR_Support

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_U-Boot#U-Boot_SPI_Support

    Regards,

    Pavel

  • 0
    Guru 31670 points

    Akshay,

    akshay bharadwaj said:
    2. How to program the Flash using the ARM processor

    I guess you meant loading the FPGA bit file from ARM. If so, its possible to do it. You've to drive the GPMC data bus with the databytes and drive the GPIO signals accordingly. It all depends on the FPGA and the interface as well.