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DDR3 Layout Rules and Required Layout Tools

Other Parts Discussed in Thread: AM3352

Does anyone have any tips or tricks for routing dual DDR3 ICs without having the highest end layout tools?  I'm interested in routing two x8 DDR3 ICS with the AM3352.  As I'm attempting to translate the routing specs from Table 5-61 of the datasheet into the constraint manager of OrCAD's PCB Designer Professional, I'm having difficulty seeing a way to really pull this off.  I'm able to define min and max lengths for a single net, however if I want to define min and max lengths for sections of a net (my interpretation of what I need to do to satisfy Table 5-61) I need to upgrade to a higher end version of OrCAD so I can constrain XNets, which is a lot of money I'd rather avoid spending.

So the ultimate question is:  Does anyone have any tips or tricks to pull off dual chip DDR3 with basic constraint options?

Thanks!

-Randy