I am using starterware and wrote code for SPI communication. Project debug fine. I've shorted MISO to MOSI of beaglebone to check weather the program is working or not.
The following code isn't running.
Please help me in this program and tell what's the problem?
#include "soc_AM335x.h"
#include "beaglebone.h"
#include "gpio_v2.h"
#include "mcspi.h"
#include "clock.h"
#include "hw_types.h"
void SPIClkConfig(void);
//#include "pin_mux.h"
#define GPIO_INSTANCE_ADDRESS (SOC_GPIO_1_REGS)
#define GPIO_INSTANCE_PIN_NUMBER_0 (02)
/*
* main.c
*/
int main(void)
{
unsigned int i;
/* Enabling functional clocks for GPIO1 instance. */
GPIO1ModuleClkConfig();
SPIClkConfig(); // Enable clock for SPI
HWREG(0x44E10000 + 0x95C)=0x8; // Pin Mux settings
HWREG(0x44E10000 + 0x958)=0x28; // Pin Mux settings
HWREG(0x44E10000 + 0x954)=0x8; // Pin Mux settings
HWREG(0x44E10000 + 0x950)=0x8; // Pin Mux settings
/* Enabling the GPIO module. */
GPIOModuleEnable(GPIO_INSTANCE_ADDRESS);
//enableModule(CLK_SPI0); // Enable module
/* Resetting the GPIO module. */
GPIOModuleReset(GPIO_INSTANCE_ADDRESS);
McSPIReset(SOC_SPI_0_REGS); // Reset the module
/* Setting the GPIO pin as an output pin. */
GPIODirModeSet(GPIO_INSTANCE_ADDRESS, GPIO_INSTANCE_PIN_NUMBER_0,
GPIO_DIR_OUTPUT);
GPIOPinWrite(GPIO_INSTANCE_ADDRESS, GPIO_INSTANCE_PIN_NUMBER_0,
GPIO_PIN_HIGH);
McSPICSEnable(SOC_SPI_0_REGS); // Enable SPI0 with 4 pin
McSPIMasterModeEnable(SOC_SPI_0_REGS); // Enable SPI0 as master mode
/*set D0 as output-MOSI , set D1 as input-MISO*/
while(McSPIMasterModeConfig(SOC_SPI_0_REGS,MCSPI_SINGLE_CH,MCSPI_TX_RX_MODE,
MCSPI_CH0CONF_DPE1_DISABLED|MCSPI_CH0CONF_DPE0_ENABLED,MCSPI_CHANNEL_0)!=TRUE){ }
McSPIClkConfig(SOC_SPI_0_REGS,10000000,500000,MCSPI_CHANNEL_0,MCSPI_CLK_MODE_1 ); //SPI_0, 5MHz clock, Channel 0, PHA=1, POL=0
McSPIWordLengthSet(SOC_SPI_0_REGS,MCSPI_WORD_LENGTH(8),MCSPI_CHANNEL_0); // 8-bit data lenght
McSPICSPolarityConfig(SOC_SPI_0_REGS,MCSPI_CS_POL_LOW,MCSPI_CHANNEL_0); // CS active low
// McSPIStartBitEnable(SOC_SPI_0_REGS,MCSPI_CHANNEL_0); // start bit enable
// McSPITxFIFOConfig(SOC_SPI_0_REGS,MCSPI_TX_FIFO_ENABLE,MCSPI_CHANNEL_0); // TX FIFO enable
// McSPIRxFIFOConfig(SOC_SPI_0_REGS,MCSPI_RX_FIFO_ENABLE,MCSPI_CHANNEL_0); // RX FIFO enable
McSPICSDeAssert(SOC_SPI_0_REGS,MCSPI_CHANNEL_0); // set CS to High
McSPIChannelEnable(SOC_SPI_0_REGS,MCSPI_CHANNEL_0); // enable SPI0 and Channel_0
McSPIIntEnable(SOC_SPI_0_REGS,MCSPI_INT_TX_EMPTY(0));// Interrupt to check if TX FIFO is empty
McSPIIntStatusClear(SOC_SPI_0_REGS,MCSPI_INT_TX_EMPTY(0)); // clear the status of the interrupt flag
McSPICSTimeControlSet(SOC_SPI_0_REGS,MCSPI_CS_TCS_0PNT5_CLK,MCSPI_CHANNEL_0); // delay of half cycle between CS low and transfer
McSPICSAssert(SOC_SPI_0_REGS,MCSPI_CHANNEL_0); // set CS to Low
McSPITransmitData(SOC_SPI_0_REGS,0x00,MCSPI_CHANNEL_0); // transmit data
i=McSPIReceiveData(SOC_SPI_0_REGS,MCSPI_CHANNEL_0);
while(1);
}
void SPIClkConfig(void)
{
/* Writing to MODULEMODE field of CM_PER_SPI0_CLKCTRL register. */
HWREG(SOC_CM_PER_REGS + CM_PER_SPI0_CLKCTRL) |=
CM_PER_SPI0_CLKCTRL_MODULEMODE_ENABLE;
/* Waiting for MODULEMODE field to reflect the written value. */
while(CM_PER_SPI0_CLKCTRL_MODULEMODE_ENABLE !=
(HWREG(SOC_CM_PER_REGS + CM_PER_SPI0_CLKCTRL) &
CM_PER_SPI0_CLKCTRL_MODULEMODE));
/*
** Waiting for IDLEST field in CM_PER_SPI0_CLKCTRL register to attain the
** desired value.
*/
while((CM_PER_SPI0_CLKCTRL_IDLEST_FUNC <<
CM_PER_SPI0_CLKCTRL_IDLEST_SHIFT) !=
(HWREG(SOC_CM_PER_REGS + CM_PER_SPI0_CLKCTRL) &
CM_PER_SPI0_CLKCTRL_IDLEST));
while(CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_SPI_GCLK !=
(HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_SPI_GCLK));
}
