This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Control Status Register(CSR) Description for C672x processors

Hello,

I am looking for the register description of the CSR for C672x.  The instruction set for the C67x/C67x+ (SPRU733A) does show a description for the C671x family which have data and program cache split, but it doesn't say anything about the C672x family which only have one 32kB program cache,  I'm not sure how valid the description is and how it applies to the C672x processors.  Can someone please tell me where I can find the register description for the C672x processors

Thank you,

Julxhino