I [at least think I] want to use RingIO to pass video frames from the DSP to the ARM on the OMAP-L138 (MityDSP-L138F).
1) I don't think the ring will fit anywhere but in DDR. Will RingIO work with the ring assigned to DDR memory? The FAQ at (http://processors.wiki.ti.com/index.php/DSPLink_FAQs#RingIO_questions) mentions "L2 cache line boundary", and I don't fully understand that yet. Does it mean the ring must be in L2? Or otherwise... Please advise.
2) If both the DSP and ARM access DDR at the same time, how are memory access conflicts resolved? Do I need to worry about this? For example, the DSP is going to slowly write, one pixel/byte at a time, a processed video frame to one place in the ring (in DDR), while the ARM is going to slowly read, one pixel/byte at a time, an earlier processed video frame from a different place in the ring (in DDR). Surely the DDR itself is of a "one-port" type. So I'm concerned about both DSP and ARM periodically attempting DDR access at exactly the same time. Again, how is this resolved?
3) Or am I totally missing the boat here? I'm seeking the "shortest path" for programming effort to get this working, of course. One frame is 345,600 bytes, so I can't use anything other than DDR, without breaking down into slices or something.
Thanks very much.