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porting from 6474 to 6678

Other Parts Discussed in Thread: TMS320C6474

Hi all,

i want to port my code from the dsp 6474 to the new dsp 6678 ,i am  using the Mcbsp port in the old dsp and it not found in the new one any more .

the Mcbsp generate the frame for the HW side  from clk of 62.5 Mhz and i am using the both ports with total data transfer of 125Mbps , the frame generated from the McBsp is used in the HW side .

after reading about the 6678 i found that there is TSIP port but because the clk used in this protocol is const(8.163/16.326/32.768 Mhz)  i can't use it .

more info :my old dsp 6474 is in the TMS320C6474 Evaluation Module  and the new dsp is in the TMDXEVM6678 Evaluation Module .

Is it true that the TSIP  port work only with 8.163/16.326/32.768 Mhz clks?

what can replace the McBsp in the new evm board?

Thanks

  • Please take a look at the TSIP user guide (SPRUGY4) in C6678 product folder. TSIP supports 3 fixed data rates for both receive and transmit, as configured in Receive Control Register (RCVDATR field) and Transmit Control Register (XMTDATR field). And the clock mode could be double rate clock or single rate clock.

    So the serial interface clock frequency can be either 16.384 MHz or 8.192 MHz for 8.192 Mbps serial links (8 links); 32.768 MHz or 16.384 MHz for 16.384 Mbps serial links (4 links); and 65.536 MHz or 32.768 MHz for 32.768 Mbps serial links (2 links).

    The 65.536 MHz might be the similar one to the 62.5 MHz which you were using in C6474. But they are not exactly the same.

    If you would like to use McBSP with new C66x cores, you can also take a look at C6657 device, which has the McBSP module although it only has two C66x CorePacs instead of 8 in C6678.

  • thank you Steven for the fast reply.

    i read the TSIP manual 4 times and i thought thati could be mistaken about the clock frequency ,but it seems that i get it right.

      i checked the  C6657 but it don't satisfy the performance request because i need at least 30 time the performance in the 6474 ,which the C6657 don't give.

    is there any peripheral unit i can add to adapt the TSIP into macBsp ?

    OR is there any other port i can use in the 6678 which can transfer that amount of data ?

    thanks,

    majid

     

  • Majid,

    There are 2 TSIP ports in C6678 and each TSIP could have 2 active links with 32Mbps data rate. So the throughput in total could be 2(ports)*2(links)*32Mbps=128Mbps.

    I think it is no less than your throughput from C6474 McBSP ports (125Mbps).

    For the TSIP usage, please take a look at the TSIP LLD example in the C6678 PDK package, such as "C:\ti\pdk_C6678_1_1_2_5\packages\ti\drv\exampleProjects\TSIP_exampleProject".

    If you are looking for other higher speed peripherals such as PCIe, SRIO, etc., please take a look at the "Throughput Performance Guide for KeyStone devices".